diff --git a/cranelift/codegen/meta/src/shared/settings.rs b/cranelift/codegen/meta/src/shared/settings.rs index b152b4d46289..fb2ef5d3aa53 100644 --- a/cranelift/codegen/meta/src/shared/settings.rs +++ b/cranelift/codegen/meta/src/shared/settings.rs @@ -77,20 +77,6 @@ pub(crate) fn define() -> SettingGroup { true, ); - settings.add_bool( - "enable_pcc", - "Enable proof-carrying code translation validation.", - r#" - This adds a proof-carrying-code mode. Proof-carrying code (PCC) is a strategy to verify - that the compiler preserves certain properties or invariants in the compiled code. - For example, a frontend that translates WebAssembly to CLIF can embed PCC facts in - the CLIF, and Cranelift will verify that the final machine code satisfies the stated - facts at each intermediate computed value. Loads and stores can be marked as "checked" - and their memory effects can be verified as safe. - "#, - false, - ); - // Note that Cranelift doesn't currently need an is_pie flag, because PIE is // just PIC where symbols can't be pre-empted, which can be expressed with the // `colocated` flag on external functions and global values. diff --git a/cranelift/codegen/src/context.rs b/cranelift/codegen/src/context.rs index c37de05497bc..816121464a72 100644 --- a/cranelift/codegen/src/context.rs +++ b/cranelift/codegen/src/context.rs @@ -381,7 +381,6 @@ impl Context { &self.domtree, &self.loop_analysis, &mut alias_analysis, - &fisa.flags, ctrl_plane, ); pass.run(); diff --git a/cranelift/codegen/src/egraph/mod.rs b/cranelift/codegen/src/egraph/mod.rs index 280109470d01..bb7edb4851e0 100644 --- a/cranelift/codegen/src/egraph/mod.rs +++ b/cranelift/codegen/src/egraph/mod.rs @@ -7,16 +7,13 @@ use crate::cursor::{Cursor, CursorPosition, FuncCursor}; use crate::dominator_tree::DominatorTree; use crate::egraph::elaborate::Elaborator; use crate::inst_predicates::{is_mergeable_for_egraph, is_pure_for_egraph}; -use crate::ir::pcc::Fact; use crate::ir::{ - Block, DataFlowGraph, Function, Inst, InstructionData, Opcode, Type, Value, ValueDef, - ValueListPool, + Block, DataFlowGraph, Function, Inst, InstructionData, Type, Value, ValueDef, ValueListPool, }; use crate::loop_analysis::LoopAnalysis; use crate::opts::IsleContext; use crate::opts::generated_code::SkeletonInstSimplification; use crate::scoped_hash_map::{Entry as ScopedEntry, ScopedHashMap}; -use crate::settings::Flags; use crate::take_and_replace::TakeAndReplace; use crate::trace; use alloc::vec::Vec; @@ -60,8 +57,6 @@ pub struct EgraphPass<'a> { /// Loop analysis results, used for built-in LICM during /// elaboration. loop_analysis: &'a LoopAnalysis, - /// Compiler flags. - flags: &'a Flags, /// Chaos-mode control-plane so we can test that we still get /// correct results when our heuristics make bad decisions. ctrl_plane: &'a mut ControlPlane, @@ -95,7 +90,6 @@ where domtree: &'opt DominatorTree, pub(crate) alias_analysis: &'opt mut AliasAnalysis<'analysis>, pub(crate) alias_analysis_state: &'opt mut LastStores, - flags: &'opt Flags, ctrl_plane: &'opt mut ControlPlane, // Held locally during optimization of one node (recursively): pub(crate) rewrite_depth: usize, @@ -170,7 +164,6 @@ where let result = self.func.dfg.first_result(inst); self.value_to_opt_value[result] = orig_result; self.available_block[result] = self.available_block[orig_result]; - self.func.dfg.merge_facts(result, orig_result); } orig_result } else { @@ -194,8 +187,6 @@ where } }; - self.attach_constant_fact(inst, result, ty); - self.available_block[result] = self.get_available_block(inst); let opt_value = self.optimize_pure_enode(inst); log::trace!("optimizing inst {inst} orig result {result} gave {opt_value}"); @@ -387,7 +378,6 @@ where ctx.eclass_size[union_value] = eclass_size - 1; ctx.stats.union += 1; trace!(" -> union: now {}", union_value); - ctx.func.dfg.merge_facts(old_union_value, optimized_value); ctx.available_block[union_value] = ctx.merge_availability(old_union_value, optimized_value); } @@ -503,7 +493,6 @@ where ); self.value_to_opt_value[result] = new_result; self.available_block[result] = self.available_block[new_result]; - self.func.dfg.merge_facts(result, new_result); Some(SkeletonInstSimplification::Remove) } // Otherwise, generic side-effecting op -- always keep it, and @@ -695,23 +684,6 @@ where // Return the best simplification! best } - - /// Helper to propagate facts on constant values: if PCC is - /// enabled, then unconditionally add a fact attesting to the - /// Value's concrete value. - fn attach_constant_fact(&mut self, inst: Inst, value: Value, ty: Type) { - if self.flags.enable_pcc() { - if let InstructionData::UnaryImm { - opcode: Opcode::Iconst, - imm, - } = self.func.dfg.insts[inst] - { - let imm: i64 = imm.into(); - self.func.dfg.facts[value] = - Some(Fact::constant(ty.bits().try_into().unwrap(), imm as u64)); - } - } - } } impl<'a> EgraphPass<'a> { @@ -721,7 +693,6 @@ impl<'a> EgraphPass<'a> { domtree: &'a DominatorTree, loop_analysis: &'a LoopAnalysis, alias_analysis: &'a mut AliasAnalysis<'a>, - flags: &'a Flags, ctrl_plane: &'a mut ControlPlane, ) -> Self { Self { @@ -729,7 +700,6 @@ impl<'a> EgraphPass<'a> { domtree, loop_analysis, alias_analysis, - flags, ctrl_plane, stats: Stats::default(), remat_values: FxHashSet::default(), @@ -897,7 +867,6 @@ impl<'a> EgraphPass<'a> { domtree: &self.domtree, alias_analysis: self.alias_analysis, alias_analysis_state: &mut alias_analysis_state, - flags: self.flags, ctrl_plane: self.ctrl_plane, optimized_values: Default::default(), optimized_insts: Default::default(), diff --git a/cranelift/codegen/src/ir/dfg.rs b/cranelift/codegen/src/ir/dfg.rs index 016ab32e83f3..7d5843d7f458 100644 --- a/cranelift/codegen/src/ir/dfg.rs +++ b/cranelift/codegen/src/ir/dfg.rs @@ -5,7 +5,6 @@ use crate::ir; use crate::ir::builder::ReplaceBuilder; use crate::ir::dynamic_type::{DynamicTypeData, DynamicTypes}; use crate::ir::instructions::{CallInfo, InstructionData}; -use crate::ir::pcc::Fact; use crate::ir::user_stack_maps::{UserStackMapEntry, UserStackMapEntryVec}; use crate::ir::{ Block, BlockArg, BlockCall, ConstantData, ConstantPool, DynamicType, ExceptionTables, @@ -144,9 +143,6 @@ pub struct DataFlowGraph { /// Primary value table with entries for all values. values: PrimaryMap, - /// Facts: proof-carrying-code assertions about values. - pub facts: SecondaryMap>, - /// Function signature table. These signatures are referenced by indirect call instructions as /// well as the external function references. pub signatures: PrimaryMap, @@ -181,7 +177,6 @@ impl DataFlowGraph { dynamic_types: DynamicTypes::new(), value_lists: ValueListPool::new(), values: PrimaryMap::new(), - facts: SecondaryMap::new(), signatures: PrimaryMap::new(), ext_funcs: PrimaryMap::new(), values_labels: None, @@ -207,7 +202,6 @@ impl DataFlowGraph { self.constants.clear(); self.immediates.clear(); self.jump_tables.clear(); - self.facts.clear(); } /// Get the total number of instructions created in this function, whether they are currently @@ -489,21 +483,6 @@ impl DataFlowGraph { // removed), and unions (but the egraph pass ensures there are no // aliases before creating unions). - // Merge `facts` from any alias onto the aliased value. Note that if - // there was a chain of aliases, at this point every alias that was in - // the chain points to the same final value, so their facts will all be - // merged together. - for value in self.facts.keys() { - if let ValueData::Alias { original, .. } = self.values[value].into() { - if let Some(new_fact) = self.facts[value].take() { - match &mut self.facts[original] { - Some(old_fact) => *old_fact = Fact::intersect(old_fact, &new_fact), - old_fact => *old_fact = Some(new_fact), - } - } - } - } - // - `signatures` and `ext_funcs` have no values. if let Some(values_labels) = &mut self.values_labels { @@ -1075,13 +1054,7 @@ impl DataFlowGraph { // Get the controlling type variable. let ctrl_typevar = self.ctrl_typevar(inst); // Create new result values. - let num_results = self.make_inst_results(new_inst, ctrl_typevar); - // Copy over PCC facts, if any. - for i in 0..num_results { - let old_result = self.inst_results(inst)[i]; - let new_result = self.inst_results(new_inst)[i]; - self.facts[new_result] = self.facts[old_result].clone(); - } + self.make_inst_results(new_inst, ctrl_typevar); new_inst } @@ -1416,38 +1389,6 @@ impl DataFlowGraph { pub fn detach_inst_results(&mut self, inst: Inst) { self.results[inst].clear(&mut self.value_lists); } - - /// Merge the facts for two values. If both values have facts and - /// they differ, both values get a special "conflict" fact that is - /// never satisfied. - pub fn merge_facts(&mut self, a: Value, b: Value) { - let a = self.resolve_aliases(a); - let b = self.resolve_aliases(b); - match (&self.facts[a], &self.facts[b]) { - (Some(a), Some(b)) if a == b => { /* nothing */ } - (None, None) => { /* nothing */ } - (Some(a), None) => { - self.facts[b] = Some(a.clone()); - } - (None, Some(b)) => { - self.facts[a] = Some(b.clone()); - } - (Some(a_fact), Some(b_fact)) => { - assert_eq!(self.value_type(a), self.value_type(b)); - let merged = Fact::intersect(a_fact, b_fact); - crate::trace!( - "facts merge on {} and {}: {:?}, {:?} -> {:?}", - a, - b, - a_fact, - b_fact, - merged, - ); - self.facts[a] = Some(merged.clone()); - self.facts[b] = Some(merged); - } - } - } } /// Contents of a basic block. diff --git a/cranelift/codegen/src/ir/entities.rs b/cranelift/codegen/src/ir/entities.rs index d0ee82ca4872..b4bbd68bb619 100644 --- a/cranelift/codegen/src/ir/entities.rs +++ b/cranelift/codegen/src/ir/entities.rs @@ -187,25 +187,6 @@ impl GlobalValue { } } -/// An opaque reference to a memory type. -/// -/// A `MemoryType` is a descriptor of a struct layout in memory, with -/// types and proof-carrying-code facts optionally attached to the -/// fields. -#[derive(Copy, Clone, PartialEq, Eq, Hash, PartialOrd, Ord)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub struct MemoryType(u32); -entity_impl!(MemoryType, "mt"); - -impl MemoryType { - /// Create a new memory type reference from its number. - /// - /// This method is for use by the parser. - pub fn with_number(n: u32) -> Option { - if n < u32::MAX { Some(Self(n)) } else { None } - } -} - /// An opaque reference to a constant. /// /// You can store [`ConstantData`](super::ConstantData) in a @@ -400,8 +381,6 @@ pub enum AnyEntity { DynamicType(DynamicType), /// A Global value. GlobalValue(GlobalValue), - /// A memory type. - MemoryType(MemoryType), /// A jump table. JumpTable(JumpTable), /// A constant. @@ -427,7 +406,6 @@ impl fmt::Display for AnyEntity { Self::DynamicStackSlot(r) => r.fmt(f), Self::DynamicType(r) => r.fmt(f), Self::GlobalValue(r) => r.fmt(f), - Self::MemoryType(r) => r.fmt(f), Self::JumpTable(r) => r.fmt(f), Self::Constant(r) => r.fmt(f), Self::FuncRef(r) => r.fmt(f), @@ -486,12 +464,6 @@ impl From for AnyEntity { } } -impl From for AnyEntity { - fn from(r: MemoryType) -> Self { - Self::MemoryType(r) - } -} - impl From for AnyEntity { fn from(r: JumpTable) -> Self { Self::JumpTable(r) diff --git a/cranelift/codegen/src/ir/function.rs b/cranelift/codegen/src/ir/function.rs index 80926edcdf1c..7253fd5e84c3 100644 --- a/cranelift/codegen/src/ir/function.rs +++ b/cranelift/codegen/src/ir/function.rs @@ -9,8 +9,8 @@ use crate::ir::DebugTags; use crate::ir::{ self, Block, DataFlowGraph, DynamicStackSlot, DynamicStackSlotData, DynamicStackSlots, DynamicType, ExtFuncData, FuncRef, GlobalValue, GlobalValueData, Inst, JumpTable, - JumpTableData, Layout, MemoryType, MemoryTypeData, SigRef, Signature, SourceLocs, StackSlot, - StackSlotData, StackSlots, Type, pcc::Fact, + JumpTableData, Layout, SigRef, Signature, SourceLocs, StackSlot, StackSlotData, StackSlots, + Type, }; use crate::isa::CallConv; use crate::write::{write_function, write_function_spec}; @@ -173,12 +173,6 @@ pub struct FunctionStencil { /// Global values referenced. pub global_values: PrimaryMap, - /// Global value proof-carrying-code facts. - pub global_value_facts: SecondaryMap>, - - /// Memory types for proof-carrying code. - pub memory_types: PrimaryMap, - /// Data flow graph containing the primary definition of all instructions, blocks and values. pub dfg: DataFlowGraph, @@ -221,8 +215,6 @@ impl FunctionStencil { self.sized_stack_slots.clear(); self.dynamic_stack_slots.clear(); self.global_values.clear(); - self.global_value_facts.clear(); - self.memory_types.clear(); self.dfg.clear(); self.layout.clear(); self.srclocs.clear(); @@ -257,11 +249,6 @@ impl FunctionStencil { self.global_values.push(data) } - /// Declares a memory type for use by the function. - pub fn create_memory_type(&mut self, data: MemoryTypeData) -> MemoryType { - self.memory_types.push(data) - } - /// Find the global dyn_scale value associated with given DynamicType. pub fn get_dyn_scale(&self, ty: DynamicType) -> GlobalValue { self.dfg.dynamic_types.get(ty).unwrap().dynamic_scale @@ -420,8 +407,6 @@ impl Function { sized_stack_slots: StackSlots::new(), dynamic_stack_slots: DynamicStackSlots::new(), global_values: PrimaryMap::new(), - global_value_facts: SecondaryMap::new(), - memory_types: PrimaryMap::new(), dfg: DataFlowGraph::new(), layout: Layout::new(), srclocs: SecondaryMap::new(), diff --git a/cranelift/codegen/src/ir/memflags.rs b/cranelift/codegen/src/ir/memflags.rs index 45f32ce85fd2..7e1f1cb43894 100644 --- a/cranelift/codegen/src/ir/memflags.rs +++ b/cranelift/codegen/src/ir/memflags.rs @@ -97,12 +97,6 @@ const BIT_LITTLE_ENDIAN: u16 = 1 << 2; /// Load multi-byte values from memory in a big-endian format. const BIT_BIG_ENDIAN: u16 = 1 << 3; -/// Check this load or store for safety when using the -/// proof-carrying-code framework. The address must have a -/// `PointsTo` fact attached with a sufficiently large valid range -/// for the accessed size. -const BIT_CHECKED: u16 = 1 << 4; - /// Used for alias analysis, indicates which disjoint part of the abstract state /// is being accessed. const MASK_ALIAS_REGION: u16 = 0b11 << ALIAS_REGION_OFFSET; @@ -204,7 +198,6 @@ impl MemFlags { } self.with_alias_region(Some(AliasRegion::Vmctx)) } - "checked" => self.with_checked(), "can_move" => self.with_can_move(), other => match TrapCode::from_str(other) { @@ -356,32 +349,6 @@ impl MemFlags { pub const fn with_readonly(self) -> Self { self.with_bit(BIT_READONLY) } - - /// Test if the `checked` bit is set. - /// - /// Loads and stores with this flag are verified to access - /// pointers only with a validated `PointsTo` fact attached, and - /// with that fact validated, when using the proof-carrying-code - /// framework. If initial facts on program inputs are correct - /// (i.e., correctly denote the shape and types of data structures - /// in memory), and if PCC validates the compiled output, then all - /// `checked`-marked memory accesses are guaranteed (up to the - /// checker's correctness) to access valid memory. This can be - /// used to ensure memory safety and sandboxing. - pub const fn checked(self) -> bool { - self.read_bit(BIT_CHECKED) - } - - /// Set the `checked` bit. - pub fn set_checked(&mut self) { - *self = self.with_checked(); - } - - /// Set the `checked` bit, returning new flags. - pub const fn with_checked(self) -> Self { - self.with_bit(BIT_CHECKED) - } - /// Get the trap code to report if this memory access traps. /// /// A `None` trap code indicates that this memory access does not trap. @@ -434,9 +401,6 @@ impl fmt::Display for MemFlags { if self.read_bit(BIT_LITTLE_ENDIAN) { write!(f, " little")?; } - if self.checked() { - write!(f, " checked")?; - } match self.alias_region() { None => {} Some(AliasRegion::Heap) => write!(f, " heap")?, diff --git a/cranelift/codegen/src/ir/memtype.rs b/cranelift/codegen/src/ir/memtype.rs deleted file mode 100644 index b7b0d7e2db1e..000000000000 --- a/cranelift/codegen/src/ir/memtype.rs +++ /dev/null @@ -1,190 +0,0 @@ -//! Definitions for "memory types" in CLIF. -//! -//! A memory type is a struct-like definition -- fields with offsets, -//! each field having a type and possibly an attached fact -- that we -//! can use in proof-carrying code to validate accesses to structs and -//! propagate facts onto the loaded values as well. -//! -//! Memory types are meant to be rich enough to describe the *layout* -//! of values in memory, but do not necessarily need to embody -//! higher-level features such as subtyping directly. Rather, they -//! should encode an implementation of a type or object system. -//! -//! Note also that it is a non-goal for now for this type system to be -//! "complete" or fully orthogonal: we have some restrictions now -//! (e.g., struct fields are only primitives) because this is all we -//! need for existing PCC applications, and it keeps the -//! implementation simpler. -//! -//! There are a few basic kinds of types: -//! -//! - A struct is an aggregate of fields and an overall size. Each -//! field has a *primitive Cranelift type*. This is for simplicity's -//! sake: we do not allow nested memory types because to do so -//! invites cycles, requires recursive computation of sizes, creates -//! complicated questions when field types are dynamically-sized, -//! and in general is more complexity than we need. -//! -//! The expectation (validated by PCC) is that when a checked load -//! or store accesses memory typed by a memory type, accesses will -//! only be to fields at offsets named in the type, and will be via -//! the given Cranelift type -- i.e., no type-punning occurs in -//! memory. -//! -//! The overall size of the struct may be larger than that implied -//! by the fields because (i) we may not want or need to name all -//! the actually-existing fields in the memory type, and (ii) there -//! may be alignment padding that we also don't want or need to -//! represent explicitly. -//! -//! - A static memory is an untyped blob of storage with a static -//! size. This is memory that can be accessed with any type of load -//! or store at any valid offset. -//! -//! Note that this is *distinct* from an "array of u8" kind of -//! representation of memory, if/when we can represent such a thing, -//! because the expectation with memory types' fields (including -//! array elements) is that they are strongly typed, only accessed -//! via that type, and not type-punned. We don't want to imply any -//! restriction on load/store size, or any actual structure, with -//! untyped memory; it's just a blob. -//! -//! Eventually we plan to also have: -//! -//! - A dynamic array is a sequence of struct memory types, with a -//! length given by a global value (GV). This is useful to model, -//! e.g., tables. -//! -//! - A discriminated union is a union of several memory types -//! together with a tag field. This will be useful to model and -//! verify subtyping/downcasting for Wasm GC, among other uses. -//! -//! - Nullability on pointer fields: the fact will hold only if the -//! field is not null (all zero bits). - -use crate::ir::pcc::Fact; -use crate::ir::{GlobalValue, Type}; -use alloc::vec::Vec; - -#[cfg(feature = "enable-serde")] -use serde_derive::{Deserialize, Serialize}; - -/// Data defining a memory type. -/// -/// A memory type corresponds to a layout of data in memory. It may -/// have a statically-known or dynamically-known size. -#[derive(Clone, PartialEq, Hash)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub enum MemoryTypeData { - /// An aggregate consisting of certain fields at certain offsets. - /// - /// Fields must be sorted by offset, must be within the struct's - /// overall size, and must not overlap. These conditions are - /// checked by the CLIF verifier. - Struct { - /// Size of this type. - size: u64, - - /// Fields in this type. Sorted by offset. - fields: Vec, - }, - - /// A statically-sized untyped blob of memory. - Memory { - /// Accessible size. - size: u64, - }, - - /// A dynamically-sized untyped blob of memory, with bound given - /// by a global value plus some static amount. - DynamicMemory { - /// Static part of size. - size: u64, - /// Dynamic part of size. - gv: GlobalValue, - }, - - /// A type with no size. - Empty, -} - -impl core::default::Default for MemoryTypeData { - fn default() -> Self { - Self::Empty - } -} - -impl core::fmt::Display for MemoryTypeData { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - match self { - Self::Struct { size, fields } => { - write!(f, "struct {size} {{")?; - let mut first = true; - for field in fields { - if first { - first = false; - } else { - write!(f, ",")?; - } - write!(f, " {}: {}", field.offset, field.ty)?; - if field.readonly { - write!(f, " readonly")?; - } - if let Some(fact) = &field.fact { - write!(f, " ! {fact}")?; - } - } - write!(f, " }}")?; - Ok(()) - } - Self::Memory { size } => { - write!(f, "memory {size:#x}") - } - Self::DynamicMemory { size, gv } => { - write!(f, "dynamic_memory {gv}+{size:#x}") - } - Self::Empty => { - write!(f, "empty") - } - } - } -} - -/// One field in a memory type. -#[derive(Clone, PartialEq, Hash)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub struct MemoryTypeField { - /// The offset of this field in the memory type. - pub offset: u64, - /// The primitive type of the value in this field. Accesses to the - /// field must use this type (i.e., cannot bitcast/type-pun in - /// memory). - pub ty: Type, - /// A proof-carrying-code fact about this value, if any. - pub fact: Option, - /// Whether this field is read-only, i.e., stores should be - /// disallowed. - pub readonly: bool, -} - -impl MemoryTypeField { - /// Get the fact, if any, on a field. - pub fn fact(&self) -> Option<&Fact> { - self.fact.as_ref() - } -} - -impl MemoryTypeData { - /// Provide the static size of this type, if known. - /// - /// (The size may not be known for dynamically-sized arrays or - /// memories, when those memtype kinds are added.) - pub fn static_size(&self) -> Option { - match self { - Self::Struct { size, .. } => Some(*size), - Self::Memory { size } => Some(*size), - Self::DynamicMemory { .. } => None, - Self::Empty => Some(0), - } - } -} diff --git a/cranelift/codegen/src/ir/mod.rs b/cranelift/codegen/src/ir/mod.rs index eca17e7badda..3b9e540d48bd 100644 --- a/cranelift/codegen/src/ir/mod.rs +++ b/cranelift/codegen/src/ir/mod.rs @@ -20,8 +20,6 @@ pub(crate) mod known_symbol; pub mod layout; pub(crate) mod libcall; mod memflags; -mod memtype; -pub mod pcc; mod progpoint; mod sourceloc; pub mod stackslot; @@ -42,8 +40,7 @@ pub use crate::ir::dfg::{BlockData, DataFlowGraph, ValueDef}; pub use crate::ir::dynamic_type::{DynamicTypeData, DynamicTypes, dynamic_to_fixed}; pub use crate::ir::entities::{ Block, Constant, DynamicStackSlot, DynamicType, ExceptionTable, ExceptionTag, FuncRef, - GlobalValue, Immediate, Inst, JumpTable, MemoryType, SigRef, StackSlot, UserExternalNameRef, - Value, + GlobalValue, Immediate, Inst, JumpTable, SigRef, StackSlot, UserExternalNameRef, Value, }; pub use crate::ir::exception_table::{ExceptionTableData, ExceptionTableItem}; pub use crate::ir::extfunc::{ @@ -60,8 +57,6 @@ pub use crate::ir::known_symbol::KnownSymbol; pub use crate::ir::layout::Layout; pub use crate::ir::libcall::{LibCall, get_probestack_funcref}; pub use crate::ir::memflags::{AliasRegion, Endianness, MemFlags}; -pub use crate::ir::memtype::{MemoryTypeData, MemoryTypeField}; -pub use crate::ir::pcc::{BaseExpr, Expr, Fact, FactContext, PccError, PccResult}; pub use crate::ir::progpoint::ProgramPoint; pub use crate::ir::sourceloc::RelSourceLoc; pub use crate::ir::sourceloc::SourceLoc; diff --git a/cranelift/codegen/src/ir/pcc.rs b/cranelift/codegen/src/ir/pcc.rs deleted file mode 100644 index 8b9a3cc6bb6e..000000000000 --- a/cranelift/codegen/src/ir/pcc.rs +++ /dev/null @@ -1,1680 +0,0 @@ -//! Proof-carrying code. We attach "facts" to values and then check -//! that they remain true after compilation. -//! -//! A few key design principle of this approach are: -//! -//! - The producer of the IR provides the axioms. All "ground truth", -//! such as what memory is accessible -- is meant to come by way of -//! facts on the function arguments and global values. In some -//! sense, all we are doing here is validating the "internal -//! consistency" of the facts that are provided on values, and the -//! actions performed on those values. -//! -//! - We do not derive and forward-propagate facts eagerly. Rather, -//! the producer needs to provide breadcrumbs -- a "proof witness" -//! of sorts -- to allow the checking to complete. That means that -//! as an address is computed, or pointer chains are dereferenced, -//! each intermediate value will likely have some fact attached. -//! -//! This does create more verbose IR, but a significant positive -//! benefit is that it avoids unnecessary work: we do not build up a -//! knowledge base that effectively encodes the integer ranges of -//! many or most values in the program. Rather, we only check -//! specifically the memory-access sequences. In practice, each such -//! sequence is likely to be a carefully-controlled sequence of IR -//! operations from, e.g., a sandboxing compiler (such as -//! Wasmtime) so adding annotations here to communicate -//! intent (ranges, bounds-checks, and the like) is no problem. -//! -//! Facts are attached to SSA values in CLIF, and are maintained -//! through optimizations and through lowering. They are thus also -//! present on VRegs in the VCode. In theory, facts could be checked -//! at either level, though in practice it is most useful to check -//! them at the VCode level if the goal is an end-to-end verification -//! of certain properties (e.g., memory sandboxing). -//! -//! Checking facts entails visiting each instruction that defines a -//! value with a fact, and checking the result's fact against the -//! facts on arguments and the operand. For VCode, this is -//! fundamentally a question of the target ISA's semantics, so we call -//! into the `LowerBackend` for this. Note that during checking there -//! is also limited forward propagation / inference, but only within -//! an instruction: for example, an addressing mode commonly can -//! include an addition, multiplication/shift, or extend operation, -//! and there is no way to attach facts to the intermediate values -//! "inside" the instruction, so instead the backend can use -//! `FactContext::add()` and friends to forward-propagate facts. -//! -//! TODO: -//! -//! Deployment: -//! - Add to fuzzing -//! - Turn on during wasm spec-tests -//! -//! More checks: -//! - Check that facts on `vmctx` GVs are subsumed by the actual facts -//! on the vmctx arg in block0 (function arg). -//! -//! Generality: -//! - facts on outputs (in func signature)? -//! - Implement checking at the CLIF level as well. -//! - Check instructions that can trap as well? -//! -//! Nicer errors: -//! - attach instruction index or some other identifier to errors -//! -//! Text format cleanup: -//! - make the bitwidth on `max` facts optional in the CLIF text -//! format? -//! - make offset in `mem` fact optional in the text format? -//! -//! Bikeshed colors (syntax): -//! - Put fact bang-annotations after types? -//! `v0: i64 ! fact(..)` vs. `v0 ! fact(..): i64` - -use crate::ir; -use crate::ir::types::*; -use crate::isa::TargetIsa; -use crate::machinst::{BlockIndex, LowerBackend, VCode}; -use crate::trace; -use core::fmt; -use regalloc2::Function as _; - -#[cfg(feature = "enable-serde")] -use serde_derive::{Deserialize, Serialize}; - -/// The result of checking proof-carrying-code facts. -pub type PccResult = core::result::Result; - -/// An error or inconsistency discovered when checking proof-carrying -/// code. -#[derive(Debug, Clone)] -pub enum PccError { - /// An operation wraps around, invalidating the stated value - /// range. - Overflow, - /// An input to an operator that produces a fact-annotated value - /// does not have a fact describing it, and one is needed. - MissingFact, - /// A derivation of an output fact is unsupported (incorrect or - /// not derivable). - UnsupportedFact, - /// A block parameter claims a fact that one of its predecessors - /// does not support. - UnsupportedBlockparam, - /// A memory access is out of bounds. - OutOfBounds, - /// Proof-carrying-code checking is not implemented for a - /// particular compiler backend. - UnimplementedBackend, - /// Proof-carrying-code checking is not implemented for a - /// particular instruction that instruction-selection chose. This - /// is an internal compiler error. - UnimplementedInst, - /// Access to an invalid or undefined field offset in a struct. - InvalidFieldOffset, - /// Access to a field via the wrong type. - BadFieldType, - /// Store to a read-only field. - WriteToReadOnlyField, - /// Store of data to a field with a fact that does not subsume the - /// field's fact. - InvalidStoredFact, -} - -/// A fact on a value. -#[derive(Clone, Debug, Hash, PartialEq, Eq)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub enum Fact { - /// A bitslice of a value (up to a bitwidth) is within the given - /// integer range. - /// - /// The slicing behavior is needed because this fact can describe - /// both an SSA `Value`, whose entire value is well-defined, and a - /// `VReg` in VCode, whose bits beyond the type stored in that - /// register are don't-care (undefined). - Range { - /// The bitwidth of bits we care about, from the LSB upward. - bit_width: u16, - /// The minimum value that the bitslice can take - /// (inclusive). The range is unsigned: the specified bits of - /// the actual value will be greater than or equal to this - /// value, as evaluated by an unsigned integer comparison. - min: u64, - /// The maximum value that the bitslice can take - /// (inclusive). The range is unsigned: the specified bits of - /// the actual value will be less than or equal to this value, - /// as evaluated by an unsigned integer comparison. - max: u64, - }, - - /// A value bounded by a global value. - /// - /// The range is in `(min_GV + min_offset)..(max_GV + - /// max_offset)`, inclusive on the lower and upper bound. - DynamicRange { - /// The bitwidth of bits we care about, from the LSB upward. - bit_width: u16, - /// The lower bound, inclusive. - min: Expr, - /// The upper bound, inclusive. - max: Expr, - }, - - /// A pointer to a memory type. - Mem { - /// The memory type. - ty: ir::MemoryType, - /// The minimum offset into the memory type, inclusive. - min_offset: u64, - /// The maximum offset into the memory type, inclusive. - max_offset: u64, - /// This pointer can also be null. - nullable: bool, - }, - - /// A pointer to a memory type, dynamically bounded. The pointer - /// is within `(GV_min+offset_min)..(GV_max+offset_max)` - /// (inclusive on both ends) in the memory type. - DynamicMem { - /// The memory type. - ty: ir::MemoryType, - /// The lower bound, inclusive. - min: Expr, - /// The upper bound, inclusive. - max: Expr, - /// This pointer can also be null. - nullable: bool, - }, - - /// A definition of a value to be used as a symbol in - /// BaseExprs. There can only be one of these per value number. - /// - /// Note that this differs from a `DynamicRange` specifying that - /// some value in the program is the same as `value`. A `def(v1)` - /// fact is propagated to machine code and serves as a source of - /// truth: the value or location labeled with this fact *defines* - /// what `v1` is, and any `dynamic_range(64, v1, v1)`-labeled - /// values elsewhere are claiming to be equal to this value. - /// - /// This is necessary because we don't propagate SSA value labels - /// down to machine code otherwise; so when referring symbolically - /// to addresses and expressions derived from addresses, we need - /// to introduce the symbol first. - Def { - /// The SSA value this value defines. - value: ir::Value, - }, - - /// A comparison result between two dynamic values with a - /// comparison of a certain kind. - Compare { - /// The kind of comparison. - kind: ir::condcodes::IntCC, - /// The left-hand side of the comparison. - lhs: Expr, - /// The right-hand side of the comparison. - rhs: Expr, - }, - - /// A "conflict fact": this fact results from merging two other - /// facts, and it can never be satisfied -- checking any value - /// against this fact will fail. - Conflict, -} - -/// A bound expression. -#[derive(Clone, Debug, Hash, PartialEq, Eq)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub struct Expr { - /// The dynamic (base) part. - pub base: BaseExpr, - /// The static (offset) part. - pub offset: i64, -} - -/// The base part of a bound expression. -#[derive(Clone, Debug, Hash, PartialEq, Eq)] -#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] -pub enum BaseExpr { - /// No dynamic part (i.e., zero). - None, - /// A global value. - GlobalValue(ir::GlobalValue), - /// An SSA Value as a symbolic value. This can be referenced in - /// facts even after we've lowered out of SSA: it becomes simply - /// some symbolic value. - Value(ir::Value), - /// Top of the address space. This is "saturating": the offset - /// doesn't matter. - Max, -} - -impl BaseExpr { - /// Is one base less than or equal to another? (We can't always - /// know; in such cases, returns `false`.) - fn le(lhs: &BaseExpr, rhs: &BaseExpr) -> bool { - // (i) reflexivity; (ii) 0 <= x for all (unsigned) x; (iii) x <= max for all x. - lhs == rhs || *lhs == BaseExpr::None || *rhs == BaseExpr::Max - } - - /// Compute some BaseExpr that will be less than or equal to both - /// inputs. This is a generalization of `min` (but looser). - fn min(lhs: &BaseExpr, rhs: &BaseExpr) -> BaseExpr { - if lhs == rhs { - lhs.clone() - } else if *lhs == BaseExpr::Max { - rhs.clone() - } else if *rhs == BaseExpr::Max { - lhs.clone() - } else { - BaseExpr::None // zero is <= x for all (unsigned) x. - } - } - - /// Compute some BaseExpr that will be greater than or equal to - /// both inputs. - fn max(lhs: &BaseExpr, rhs: &BaseExpr) -> BaseExpr { - if lhs == rhs { - lhs.clone() - } else if *lhs == BaseExpr::None { - rhs.clone() - } else if *rhs == BaseExpr::None { - lhs.clone() - } else { - BaseExpr::Max - } - } -} - -impl Expr { - /// Constant value. - pub fn constant(offset: i64) -> Self { - Expr { - base: BaseExpr::None, - offset, - } - } - - /// The value of an SSA value. - pub fn value(value: ir::Value) -> Self { - Expr { - base: BaseExpr::Value(value), - offset: 0, - } - } - - /// The value of a global value. - pub fn global_value(gv: ir::GlobalValue) -> Self { - Expr { - base: BaseExpr::GlobalValue(gv), - offset: 0, - } - } - - /// Is one expression definitely less than or equal to another? - /// (We can't always know; in such cases, returns `false`.) - fn le(lhs: &Expr, rhs: &Expr) -> bool { - if rhs.base == BaseExpr::Max { - true - } else { - BaseExpr::le(&lhs.base, &rhs.base) && lhs.offset <= rhs.offset - } - } - - /// Generalization of `min`: compute some Expr that is less than - /// or equal to both inputs. - fn min(lhs: &Expr, rhs: &Expr) -> Expr { - if lhs.base == BaseExpr::None && lhs.offset == 0 { - lhs.clone() - } else if rhs.base == BaseExpr::None && rhs.offset == 0 { - rhs.clone() - } else { - Expr { - base: BaseExpr::min(&lhs.base, &rhs.base), - offset: core::cmp::min(lhs.offset, rhs.offset), - } - } - } - - /// Generalization of `max`: compute some Expr that is greater - /// than or equal to both inputs. - fn max(lhs: &Expr, rhs: &Expr) -> Expr { - if lhs.base == BaseExpr::None && lhs.offset == 0 { - rhs.clone() - } else if rhs.base == BaseExpr::None && rhs.offset == 0 { - lhs.clone() - } else { - Expr { - base: BaseExpr::max(&lhs.base, &rhs.base), - offset: core::cmp::max(lhs.offset, rhs.offset), - } - } - } - - /// Add one expression to another. - fn add(lhs: &Expr, rhs: &Expr) -> Option { - if lhs.base == rhs.base { - Some(Expr { - base: lhs.base.clone(), - offset: lhs.offset.checked_add(rhs.offset)?, - }) - } else if lhs.base == BaseExpr::None { - Some(Expr { - base: rhs.base.clone(), - offset: lhs.offset.checked_add(rhs.offset)?, - }) - } else if rhs.base == BaseExpr::None { - Some(Expr { - base: lhs.base.clone(), - offset: lhs.offset.checked_add(rhs.offset)?, - }) - } else { - Some(Expr { - base: BaseExpr::Max, - offset: 0, - }) - } - } - - /// Add a static offset to an expression. - pub fn offset(lhs: &Expr, rhs: i64) -> Option { - let offset = lhs.offset.checked_add(rhs)?; - Some(Expr { - base: lhs.base.clone(), - offset, - }) - } - - /// Is this Expr a BaseExpr with no offset? Return it if so. - pub fn without_offset(&self) -> Option<&BaseExpr> { - if self.offset == 0 { - Some(&self.base) - } else { - None - } - } -} - -impl fmt::Display for BaseExpr { - fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { - match self { - BaseExpr::None => Ok(()), - BaseExpr::Max => write!(f, "max"), - BaseExpr::GlobalValue(gv) => write!(f, "{gv}"), - BaseExpr::Value(value) => write!(f, "{value}"), - } - } -} - -impl BaseExpr { - /// Does this dynamic_expression take an offset? - pub fn is_some(&self) -> bool { - match self { - BaseExpr::None => false, - _ => true, - } - } -} - -impl fmt::Display for Expr { - fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { - write!(f, "{}", self.base)?; - match self.offset { - offset if offset > 0 && self.base.is_some() => write!(f, "+{offset:#x}"), - offset if offset > 0 => write!(f, "{offset:#x}"), - offset if offset < 0 => { - let negative_offset = -i128::from(offset); // upcast to support i64::MIN. - write!(f, "-{negative_offset:#x}") - } - 0 if self.base.is_some() => Ok(()), - 0 => write!(f, "0"), - _ => unreachable!(), - } - } -} - -impl fmt::Display for Fact { - fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { - match self { - Fact::Range { - bit_width, - min, - max, - } => write!(f, "range({bit_width}, {min:#x}, {max:#x})"), - Fact::DynamicRange { - bit_width, - min, - max, - } => { - write!(f, "dynamic_range({bit_width}, {min}, {max})") - } - Fact::Mem { - ty, - min_offset, - max_offset, - nullable, - } => { - let nullable_flag = if *nullable { ", nullable" } else { "" }; - write!( - f, - "mem({ty}, {min_offset:#x}, {max_offset:#x}{nullable_flag})" - ) - } - Fact::DynamicMem { - ty, - min, - max, - nullable, - } => { - let nullable_flag = if *nullable { ", nullable" } else { "" }; - write!(f, "dynamic_mem({ty}, {min}, {max}{nullable_flag})") - } - Fact::Def { value } => write!(f, "def({value})"), - Fact::Compare { kind, lhs, rhs } => { - write!(f, "compare({kind}, {lhs}, {rhs})") - } - Fact::Conflict => write!(f, "conflict"), - } - } -} - -impl Fact { - /// Create a range fact that specifies a single known constant value. - pub fn constant(bit_width: u16, value: u64) -> Self { - debug_assert!(value <= max_value_for_width(bit_width)); - // `min` and `max` are inclusive, so this specifies a range of - // exactly one value. - Fact::Range { - bit_width, - min: value, - max: value, - } - } - - /// Create a dynamic range fact that points to the base of a dynamic memory. - pub fn dynamic_base_ptr(ty: ir::MemoryType) -> Self { - Fact::DynamicMem { - ty, - min: Expr::constant(0), - max: Expr::constant(0), - nullable: false, - } - } - - /// Create a fact that specifies the value is exactly an SSA value. - /// - /// Note that this differs from a `def` fact: it is not *defining* - /// a symbol to have the value that this fact is attached to; - /// rather it is claiming that this value is the same as whatever - /// that symbol is. (In other words, the def should be elsewhere, - /// and we are tying ourselves to it.) - pub fn value(bit_width: u16, value: ir::Value) -> Self { - Fact::DynamicRange { - bit_width, - min: Expr::value(value), - max: Expr::value(value), - } - } - - /// Create a fact that specifies the value is exactly an SSA value plus some offset. - pub fn value_offset(bit_width: u16, value: ir::Value, offset: i64) -> Self { - Fact::DynamicRange { - bit_width, - min: Expr::offset(&Expr::value(value), offset).unwrap(), - max: Expr::offset(&Expr::value(value), offset).unwrap(), - } - } - - /// Create a fact that specifies the value is exactly the value of a GV. - pub fn global_value(bit_width: u16, gv: ir::GlobalValue) -> Self { - Fact::DynamicRange { - bit_width, - min: Expr::global_value(gv), - max: Expr::global_value(gv), - } - } - - /// Create a fact that specifies the value is exactly the value of a GV plus some offset. - pub fn global_value_offset(bit_width: u16, gv: ir::GlobalValue, offset: i64) -> Self { - Fact::DynamicRange { - bit_width, - min: Expr::offset(&Expr::global_value(gv), offset).unwrap(), - max: Expr::offset(&Expr::global_value(gv), offset).unwrap(), - } - } - - /// Create a range fact that specifies the maximum range for a - /// value of the given bit-width. - pub const fn max_range_for_width(bit_width: u16) -> Self { - match bit_width { - bit_width if bit_width < 64 => Fact::Range { - bit_width, - min: 0, - max: (1u64 << bit_width) - 1, - }, - 64 => Fact::Range { - bit_width: 64, - min: 0, - max: u64::MAX, - }, - _ => panic!("bit width too large!"), - } - } - - /// Create a range fact that specifies the maximum range for a - /// value of the given bit-width, zero-extended into a wider - /// width. - pub const fn max_range_for_width_extended(from_width: u16, to_width: u16) -> Self { - debug_assert!(from_width <= to_width); - match from_width { - from_width if from_width < 64 => Fact::Range { - bit_width: to_width, - min: 0, - max: (1u64 << from_width) - 1, - }, - 64 => Fact::Range { - bit_width: to_width, - min: 0, - max: u64::MAX, - }, - _ => panic!("bit width too large!"), - } - } - - /// Try to infer a minimal fact for a value of the given IR type. - pub fn infer_from_type(ty: ir::Type) -> Option<&'static Self> { - static FACTS: [Fact; 4] = [ - Fact::max_range_for_width(8), - Fact::max_range_for_width(16), - Fact::max_range_for_width(32), - Fact::max_range_for_width(64), - ]; - match ty { - I8 => Some(&FACTS[0]), - I16 => Some(&FACTS[1]), - I32 => Some(&FACTS[2]), - I64 => Some(&FACTS[3]), - _ => None, - } - } - - /// Does this fact "propagate" automatically, i.e., cause - /// instructions that process it to infer their own output facts? - /// Not all facts propagate automatically; otherwise, verification - /// would be much slower. - pub fn propagates(&self) -> bool { - match self { - Fact::Mem { .. } => true, - _ => false, - } - } - - /// Is this a constant value of the given bitwidth? Return it as a - /// `Some(value)` if so. - pub fn as_const(&self, bits: u16) -> Option { - match self { - Fact::Range { - bit_width, - min, - max, - } if *bit_width == bits && min == max => Some(*min), - _ => None, - } - } - - /// Is this fact a single-value range with a symbolic Expr? - pub fn as_symbol(&self) -> Option<&Expr> { - match self { - Fact::DynamicRange { min, max, .. } if min == max => Some(min), - _ => None, - } - } - - /// Merge two facts. We take the *intersection*: that is, we know - /// both facts to be true, so we can intersect ranges. (This - /// differs from the usual static analysis approach, where we are - /// merging multiple possibilities into a generalized / widened - /// fact. We want to narrow here.) - pub fn intersect(a: &Fact, b: &Fact) -> Fact { - match (a, b) { - ( - Fact::Range { - bit_width: bw_lhs, - min: min_lhs, - max: max_lhs, - }, - Fact::Range { - bit_width: bw_rhs, - min: min_rhs, - max: max_rhs, - }, - ) if bw_lhs == bw_rhs && max_lhs >= min_rhs && max_rhs >= min_lhs => Fact::Range { - bit_width: *bw_lhs, - min: core::cmp::max(*min_lhs, *min_rhs), - max: core::cmp::min(*max_lhs, *max_rhs), - }, - - ( - Fact::DynamicRange { - bit_width: bw_lhs, - min: min_lhs, - max: max_lhs, - }, - Fact::DynamicRange { - bit_width: bw_rhs, - min: min_rhs, - max: max_rhs, - }, - ) if bw_lhs == bw_rhs && Expr::le(min_rhs, max_lhs) && Expr::le(min_lhs, max_rhs) => { - Fact::DynamicRange { - bit_width: *bw_lhs, - min: Expr::max(min_lhs, min_rhs), - max: Expr::min(max_lhs, max_rhs), - } - } - - ( - Fact::Mem { - ty: ty_lhs, - min_offset: min_offset_lhs, - max_offset: max_offset_lhs, - nullable: nullable_lhs, - }, - Fact::Mem { - ty: ty_rhs, - min_offset: min_offset_rhs, - max_offset: max_offset_rhs, - nullable: nullable_rhs, - }, - ) if ty_lhs == ty_rhs - && max_offset_lhs >= min_offset_rhs - && max_offset_rhs >= min_offset_lhs => - { - Fact::Mem { - ty: *ty_lhs, - min_offset: core::cmp::max(*min_offset_lhs, *min_offset_rhs), - max_offset: core::cmp::min(*max_offset_lhs, *max_offset_rhs), - nullable: *nullable_lhs && *nullable_rhs, - } - } - - ( - Fact::DynamicMem { - ty: ty_lhs, - min: min_lhs, - max: max_lhs, - nullable: null_lhs, - }, - Fact::DynamicMem { - ty: ty_rhs, - min: min_rhs, - max: max_rhs, - nullable: null_rhs, - }, - ) if ty_lhs == ty_rhs && Expr::le(min_rhs, max_lhs) && Expr::le(min_lhs, max_rhs) => { - Fact::DynamicMem { - ty: *ty_lhs, - min: Expr::max(min_lhs, min_rhs), - max: Expr::min(max_lhs, max_rhs), - nullable: *null_lhs && *null_rhs, - } - } - - _ => Fact::Conflict, - } - } -} - -macro_rules! ensure { - ( $condition:expr, $err:tt $(,)? ) => { - if !$condition { - return Err(PccError::$err); - } - }; -} - -macro_rules! bail { - ( $err:tt ) => {{ - return Err(PccError::$err); - }}; -} - -/// The two kinds of inequalities: "strict" (`<`, `>`) and "loose" -/// (`<=`, `>=`), the latter of which admit equality. -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum InequalityKind { - /// Strict inequality: {less,greater}-than. - Strict, - /// Loose inequality: {less,greater}-than-or-equal. - Loose, -} - -/// A "context" in which we can evaluate and derive facts. This -/// context carries environment/global properties, such as the machine -/// pointer width. -pub struct FactContext<'a> { - function: &'a ir::Function, - pointer_width: u16, -} - -impl<'a> FactContext<'a> { - /// Create a new "fact context" in which to evaluate facts. - pub fn new(function: &'a ir::Function, pointer_width: u16) -> Self { - FactContext { - function, - pointer_width, - } - } - - /// Computes whether `lhs` "subsumes" (implies) `rhs`. - pub fn subsumes(&self, lhs: &Fact, rhs: &Fact) -> bool { - match (lhs, rhs) { - // Reflexivity. - (l, r) if l == r => true, - - ( - Fact::Range { - bit_width: bw_lhs, - min: min_lhs, - max: max_lhs, - }, - Fact::Range { - bit_width: bw_rhs, - min: min_rhs, - max: max_rhs, - }, - ) => { - // If the bitwidths we're claiming facts about are the - // same, or the left-hand-side makes a claim about a - // wider bitwidth, and if the right-hand-side range is - // larger than the left-hand-side range, than the LHS - // subsumes the RHS. - // - // In other words, we can always expand the claimed - // possible value range. - bw_lhs >= bw_rhs && max_lhs <= max_rhs && min_lhs >= min_rhs - } - - ( - Fact::DynamicRange { - bit_width: bw_lhs, - min: min_lhs, - max: max_lhs, - }, - Fact::DynamicRange { - bit_width: bw_rhs, - min: min_rhs, - max: max_rhs, - }, - ) => { - // Nearly same as above, but with dynamic-expression - // comparisons. Note that we require equal bitwidths - // here: unlike in the static case, we don't have - // fixed values for min and max, so we can't lean on - // the well-formedness requirements of the static - // ranges fitting within the bit-width max. - bw_lhs == bw_rhs && Expr::le(max_lhs, max_rhs) && Expr::le(min_rhs, min_lhs) - } - - ( - Fact::Mem { - ty: ty_lhs, - min_offset: min_offset_lhs, - max_offset: max_offset_lhs, - nullable: nullable_lhs, - }, - Fact::Mem { - ty: ty_rhs, - min_offset: min_offset_rhs, - max_offset: max_offset_rhs, - nullable: nullable_rhs, - }, - ) => { - ty_lhs == ty_rhs - && max_offset_lhs <= max_offset_rhs - && min_offset_lhs >= min_offset_rhs - && (*nullable_lhs || !*nullable_rhs) - } - - ( - Fact::DynamicMem { - ty: ty_lhs, - min: min_lhs, - max: max_lhs, - nullable: nullable_lhs, - }, - Fact::DynamicMem { - ty: ty_rhs, - min: min_rhs, - max: max_rhs, - nullable: nullable_rhs, - }, - ) => { - ty_lhs == ty_rhs - && Expr::le(max_lhs, max_rhs) - && Expr::le(min_rhs, min_lhs) - && (*nullable_lhs || !*nullable_rhs) - } - - // Constant zero subsumes nullable DynamicMem pointers. - ( - Fact::Range { - bit_width, - min: 0, - max: 0, - }, - Fact::DynamicMem { nullable: true, .. }, - ) if *bit_width == self.pointer_width => true, - - // Any fact subsumes a Def, because the Def makes no - // claims about the actual value (it ties a symbol to that - // value, but the value is fed to the symbol, not the - // other way around). - (_, Fact::Def { .. }) => true, - - _ => false, - } - } - - /// Computes whether the optional fact `lhs` subsumes (implies) - /// the optional fact `lhs`. A `None` never subsumes any fact, and - /// is always subsumed by any fact at all (or no fact). - pub fn subsumes_fact_optionals(&self, lhs: Option<&Fact>, rhs: Option<&Fact>) -> bool { - match (lhs, rhs) { - (None, None) => true, - (Some(_), None) => true, - (None, Some(_)) => false, - (Some(lhs), Some(rhs)) => self.subsumes(lhs, rhs), - } - } - - /// Computes whatever fact can be known about the sum of two - /// values with attached facts. The add is performed to the given - /// bit-width. Note that this is distinct from the machine or - /// pointer width: e.g., many 64-bit machines can still do 32-bit - /// adds that wrap at 2^32. - pub fn add(&self, lhs: &Fact, rhs: &Fact, add_width: u16) -> Option { - let result = match (lhs, rhs) { - ( - Fact::Range { - bit_width: bw_lhs, - min: min_lhs, - max: max_lhs, - }, - Fact::Range { - bit_width: bw_rhs, - min: min_rhs, - max: max_rhs, - }, - ) if bw_lhs == bw_rhs && add_width >= *bw_lhs => { - let computed_min = min_lhs.checked_add(*min_rhs)?; - let computed_max = max_lhs.checked_add(*max_rhs)?; - let computed_max = core::cmp::min(max_value_for_width(add_width), computed_max); - Some(Fact::Range { - bit_width: *bw_lhs, - min: computed_min, - max: computed_max, - }) - } - - ( - Fact::Range { - bit_width: bw_max, - min, - max, - }, - Fact::Mem { - ty, - min_offset, - max_offset, - nullable, - }, - ) - | ( - Fact::Mem { - ty, - min_offset, - max_offset, - nullable, - }, - Fact::Range { - bit_width: bw_max, - min, - max, - }, - ) if *bw_max >= self.pointer_width - && add_width >= *bw_max - && (!*nullable || *max == 0) => - { - let min_offset = min_offset.checked_add(*min)?; - let max_offset = max_offset.checked_add(*max)?; - Some(Fact::Mem { - ty: *ty, - min_offset, - max_offset, - nullable: false, - }) - } - - ( - Fact::Range { - bit_width: bw_static, - min: min_static, - max: max_static, - }, - Fact::DynamicRange { - bit_width: bw_dynamic, - min: min_dynamic, - max: max_dynamic, - }, - ) - | ( - Fact::DynamicRange { - bit_width: bw_dynamic, - min: min_dynamic, - max: max_dynamic, - }, - Fact::Range { - bit_width: bw_static, - min: min_static, - max: max_static, - }, - ) if bw_static == bw_dynamic => { - let min = Expr::offset(min_dynamic, i64::try_from(*min_static).ok()?)?; - let max = Expr::offset(max_dynamic, i64::try_from(*max_static).ok()?)?; - Some(Fact::DynamicRange { - bit_width: *bw_dynamic, - min, - max, - }) - } - - ( - Fact::DynamicMem { - ty, - min: min_mem, - max: max_mem, - nullable: false, - }, - Fact::DynamicRange { - bit_width, - min: min_range, - max: max_range, - }, - ) - | ( - Fact::DynamicRange { - bit_width, - min: min_range, - max: max_range, - }, - Fact::DynamicMem { - ty, - min: min_mem, - max: max_mem, - nullable: false, - }, - ) if *bit_width == self.pointer_width => { - let min = Expr::add(min_mem, min_range)?; - let max = Expr::add(max_mem, max_range)?; - Some(Fact::DynamicMem { - ty: *ty, - min, - max, - nullable: false, - }) - } - - ( - Fact::Mem { - ty, - min_offset, - max_offset, - nullable: false, - }, - Fact::DynamicRange { - bit_width, - min: min_range, - max: max_range, - }, - ) - | ( - Fact::DynamicRange { - bit_width, - min: min_range, - max: max_range, - }, - Fact::Mem { - ty, - min_offset, - max_offset, - nullable: false, - }, - ) if *bit_width == self.pointer_width => { - let min = Expr::offset(min_range, i64::try_from(*min_offset).ok()?)?; - let max = Expr::offset(max_range, i64::try_from(*max_offset).ok()?)?; - Some(Fact::DynamicMem { - ty: *ty, - min, - max, - nullable: false, - }) - } - - ( - Fact::Range { - bit_width: bw_static, - min: min_static, - max: max_static, - }, - Fact::DynamicMem { - ty, - min: min_dynamic, - max: max_dynamic, - nullable, - }, - ) - | ( - Fact::DynamicMem { - ty, - min: min_dynamic, - max: max_dynamic, - nullable, - }, - Fact::Range { - bit_width: bw_static, - min: min_static, - max: max_static, - }, - ) if *bw_static == self.pointer_width && (!*nullable || *max_static == 0) => { - let min = Expr::offset(min_dynamic, i64::try_from(*min_static).ok()?)?; - let max = Expr::offset(max_dynamic, i64::try_from(*max_static).ok()?)?; - Some(Fact::DynamicMem { - ty: *ty, - min, - max, - nullable: false, - }) - } - - _ => None, - }; - - trace!("add: {lhs:?} + {rhs:?} -> {result:?}"); - result - } - - /// Computes the `uextend` of a value with the given facts. - pub fn uextend(&self, fact: &Fact, from_width: u16, to_width: u16) -> Option { - if from_width == to_width { - return Some(fact.clone()); - } - - let result = match fact { - // If the claim is already for a same-or-wider value and the min - // and max are within range of the narrower value, we can - // claim the same range. - Fact::Range { - bit_width, - min, - max, - } if *bit_width >= from_width - && *min <= max_value_for_width(from_width) - && *max <= max_value_for_width(from_width) => - { - Some(Fact::Range { - bit_width: to_width, - min: *min, - max: *max, - }) - } - - // If the claim is a dynamic range for the from-width, we - // can extend to the to-width. - Fact::DynamicRange { - bit_width, - min, - max, - } if *bit_width == from_width => Some(Fact::DynamicRange { - bit_width: to_width, - min: min.clone(), - max: max.clone(), - }), - - // If the claim is a definition of a value, we can say - // that the output has a range of exactly that value. - Fact::Def { value } => Some(Fact::value(to_width, *value)), - - // Otherwise, we can at least claim that the value is - // within the range of `from_width`. - Fact::Range { .. } => Some(Fact::max_range_for_width_extended(from_width, to_width)), - - _ => None, - }; - trace!("uextend: fact {fact:?} from {from_width} to {to_width} -> {result:?}"); - result - } - - /// Computes the `sextend` of a value with the given facts. - pub fn sextend(&self, fact: &Fact, from_width: u16, to_width: u16) -> Option { - match fact { - // If we have a defined value in bits 0..bit_width, and - // the MSB w.r.t. `from_width` is *not* set, then we can - // do the same as `uextend`. - Fact::Range { - bit_width, - // We can ignore `min`: it is always <= max in - // unsigned terms, and we check max's LSB below. - min: _, - max, - } if *bit_width == from_width && (*max & (1 << (*bit_width - 1)) == 0) => { - self.uextend(fact, from_width, to_width) - } - _ => None, - } - } - - /// Computes the bit-truncation of a value with the given fact. - pub fn truncate(&self, fact: &Fact, from_width: u16, to_width: u16) -> Option { - if from_width == to_width { - return Some(fact.clone()); - } - - trace!( - "truncate: fact {:?} from {} to {}", - fact, from_width, to_width - ); - - match fact { - Fact::Range { - bit_width, - min, - max, - } if *bit_width == from_width => { - let max_val = (1u64 << to_width) - 1; - if *min <= max_val && *max <= max_val { - Some(Fact::Range { - bit_width: to_width, - min: *min, - max: *max, - }) - } else { - Some(Fact::Range { - bit_width: to_width, - min: 0, - max: max_val, - }) - } - } - _ => None, - } - } - - /// Scales a value with a fact by a known constant. - pub fn scale(&self, fact: &Fact, width: u16, factor: u32) -> Option { - let result = match fact { - x if factor == 1 => Some(x.clone()), - - Fact::Range { - bit_width, - min, - max, - } if *bit_width == width => { - let min = min.checked_mul(u64::from(factor))?; - let max = max.checked_mul(u64::from(factor))?; - if *bit_width < 64 && max > max_value_for_width(width) { - return None; - } - Some(Fact::Range { - bit_width: *bit_width, - min, - max, - }) - } - _ => None, - }; - trace!("scale: {fact:?} * {factor} at width {width} -> {result:?}"); - result - } - - /// Left-shifts a value with a fact by a known constant. - pub fn shl(&self, fact: &Fact, width: u16, amount: u16) -> Option { - if amount >= 32 { - return None; - } - let factor: u32 = 1 << amount; - self.scale(fact, width, factor) - } - - /// Offsets a value with a fact by a known amount. - pub fn offset(&self, fact: &Fact, width: u16, offset: i64) -> Option { - if offset == 0 { - return Some(fact.clone()); - } - - let compute_offset = |base: u64| -> Option { - if offset >= 0 { - base.checked_add(u64::try_from(offset).unwrap()) - } else { - base.checked_sub(u64::try_from(-offset).unwrap()) - } - }; - - let result = match fact { - Fact::Range { - bit_width, - min, - max, - } if *bit_width == width => { - let min = compute_offset(*min)?; - let max = compute_offset(*max)?; - Some(Fact::Range { - bit_width: *bit_width, - min, - max, - }) - } - Fact::DynamicRange { - bit_width, - min, - max, - } if *bit_width == width => { - let min = Expr::offset(min, offset)?; - let max = Expr::offset(max, offset)?; - Some(Fact::DynamicRange { - bit_width: *bit_width, - min, - max, - }) - } - Fact::Mem { - ty, - min_offset: mem_min_offset, - max_offset: mem_max_offset, - nullable: false, - } => { - let min_offset = compute_offset(*mem_min_offset)?; - let max_offset = compute_offset(*mem_max_offset)?; - Some(Fact::Mem { - ty: *ty, - min_offset, - max_offset, - nullable: false, - }) - } - Fact::DynamicMem { - ty, - min, - max, - nullable: false, - } => { - let min = Expr::offset(min, offset)?; - let max = Expr::offset(max, offset)?; - Some(Fact::DynamicMem { - ty: *ty, - min, - max, - nullable: false, - }) - } - _ => None, - }; - trace!("offset: {fact:?} + {offset} in width {width} -> {result:?}"); - result - } - - /// Check that accessing memory via a pointer with this fact, with - /// a memory access of the given size, is valid. - /// - /// If valid, returns the memory type and offset into that type - /// that this address accesses, if known, or `None` if the range - /// doesn't constrain the access to exactly one location. - fn check_address(&self, fact: &Fact, size: u32) -> PccResult> { - trace!("check_address: fact {:?} size {}", fact, size); - match fact { - Fact::Mem { - ty, - min_offset, - max_offset, - nullable: _, - } => { - let end_offset: u64 = max_offset - .checked_add(u64::from(size)) - .ok_or(PccError::Overflow)?; - match &self.function.memory_types[*ty] { - ir::MemoryTypeData::Struct { size, .. } - | ir::MemoryTypeData::Memory { size } => { - ensure!(end_offset <= *size, OutOfBounds) - } - ir::MemoryTypeData::DynamicMemory { .. } => bail!(OutOfBounds), - ir::MemoryTypeData::Empty => bail!(OutOfBounds), - } - let specific_ty_and_offset = if min_offset == max_offset { - Some((*ty, *min_offset)) - } else { - None - }; - Ok(specific_ty_and_offset) - } - Fact::DynamicMem { - ty, - min: _, - max: - Expr { - base: BaseExpr::GlobalValue(max_gv), - offset: max_offset, - }, - nullable: _, - } => match &self.function.memory_types[*ty] { - ir::MemoryTypeData::DynamicMemory { - gv, - size: mem_static_size, - } if gv == max_gv => { - let end_offset = max_offset - .checked_add(i64::from(size)) - .ok_or(PccError::Overflow)?; - let mem_static_size = - i64::try_from(*mem_static_size).map_err(|_| PccError::Overflow)?; - ensure!(end_offset <= mem_static_size, OutOfBounds); - Ok(None) - } - _ => bail!(OutOfBounds), - }, - _ => bail!(OutOfBounds), - } - } - - /// Get the access struct field, if any, by a pointer with the - /// given fact and an access of the given type. - pub fn struct_field<'b>( - &'b self, - fact: &Fact, - access_ty: ir::Type, - ) -> PccResult> { - let (ty, offset) = match self.check_address(fact, access_ty.bytes())? { - Some((ty, offset)) => (ty, offset), - None => return Ok(None), - }; - - if let ir::MemoryTypeData::Struct { fields, .. } = &self.function.memory_types[ty] { - let field = fields - .iter() - .find(|field| field.offset == offset) - .ok_or(PccError::InvalidFieldOffset)?; - if field.ty != access_ty { - bail!(BadFieldType); - } - Ok(Some(field)) - } else { - // Access to valid memory, but not a struct: no facts can be attached to the result. - Ok(None) - } - } - - /// Check a load, and determine what fact, if any, the result of the load might have. - pub fn load<'b>(&'b self, fact: &Fact, access_ty: ir::Type) -> PccResult> { - Ok(self - .struct_field(fact, access_ty)? - .and_then(|field| field.fact())) - } - - /// Check a store. - pub fn store( - &self, - fact: &Fact, - access_ty: ir::Type, - data_fact: Option<&Fact>, - ) -> PccResult<()> { - if let Some(field) = self.struct_field(fact, access_ty)? { - // If it's a read-only field, disallow. - if field.readonly { - bail!(WriteToReadOnlyField); - } - // Check that the fact on the stored data subsumes the field's fact. - if !self.subsumes_fact_optionals(data_fact, field.fact()) { - bail!(InvalidStoredFact); - } - } - Ok(()) - } - - /// Apply a known inequality to rewrite dynamic bounds using transitivity, if possible. - /// - /// Given that `lhs >= rhs` (if not `strict`) or `lhs > rhs` (if - /// `strict`), update `fact`. - pub fn apply_inequality( - &self, - fact: &Fact, - lhs: &Fact, - rhs: &Fact, - kind: InequalityKind, - ) -> Fact { - let result = match ( - lhs.as_symbol(), - lhs.as_const(self.pointer_width) - .and_then(|k| i64::try_from(k).ok()), - rhs.as_symbol(), - fact, - ) { - ( - Some(lhs), - None, - Some(rhs), - Fact::DynamicMem { - ty, - min, - max, - nullable, - }, - ) if rhs.base == max.base => { - let strict_offset = match kind { - InequalityKind::Strict => 1, - InequalityKind::Loose => 0, - }; - if let Some(offset) = max - .offset - .checked_add(lhs.offset) - .and_then(|x| x.checked_sub(rhs.offset)) - .and_then(|x| x.checked_sub(strict_offset)) - { - let new_max = Expr { - base: lhs.base.clone(), - offset, - }; - Fact::DynamicMem { - ty: *ty, - min: min.clone(), - max: new_max, - nullable: *nullable, - } - } else { - fact.clone() - } - } - - ( - None, - Some(lhs_const), - Some(rhs), - Fact::DynamicMem { - ty, - min: _, - max, - nullable, - }, - ) if rhs.base == max.base => { - let strict_offset = match kind { - InequalityKind::Strict => 1, - InequalityKind::Loose => 0, - }; - if let Some(offset) = max - .offset - .checked_add(lhs_const) - .and_then(|x| x.checked_sub(rhs.offset)) - .and_then(|x| x.checked_sub(strict_offset)) - { - Fact::Mem { - ty: *ty, - min_offset: 0, - max_offset: u64::try_from(offset).unwrap_or(0), - nullable: *nullable, - } - } else { - fact.clone() - } - } - - _ => fact.clone(), - }; - trace!("apply_inequality({fact:?}, {lhs:?}, {rhs:?}, {kind:?} -> {result:?}"); - result - } - - /// Compute the union of two facts, if possible. - pub fn union(&self, lhs: &Fact, rhs: &Fact) -> Option { - let result = match (lhs, rhs) { - (lhs, rhs) if lhs == rhs => Some(lhs.clone()), - - ( - Fact::DynamicMem { - ty: ty_lhs, - min: min_lhs, - max: max_lhs, - nullable: nullable_lhs, - }, - Fact::DynamicMem { - ty: ty_rhs, - min: min_rhs, - max: max_rhs, - nullable: nullable_rhs, - }, - ) if ty_lhs == ty_rhs => Some(Fact::DynamicMem { - ty: *ty_lhs, - min: Expr::min(min_lhs, min_rhs), - max: Expr::max(max_lhs, max_rhs), - nullable: *nullable_lhs || *nullable_rhs, - }), - - ( - Fact::Range { - bit_width: bw_const, - min: 0, - max: 0, - }, - Fact::DynamicMem { - ty, - min, - max, - nullable: _, - }, - ) - | ( - Fact::DynamicMem { - ty, - min, - max, - nullable: _, - }, - Fact::Range { - bit_width: bw_const, - min: 0, - max: 0, - }, - ) if *bw_const == self.pointer_width => Some(Fact::DynamicMem { - ty: *ty, - min: min.clone(), - max: max.clone(), - nullable: true, - }), - - ( - Fact::Range { - bit_width: bw_const, - min: 0, - max: 0, - }, - Fact::Mem { - ty, - min_offset, - max_offset, - nullable: _, - }, - ) - | ( - Fact::Mem { - ty, - min_offset, - max_offset, - nullable: _, - }, - Fact::Range { - bit_width: bw_const, - min: 0, - max: 0, - }, - ) if *bw_const == self.pointer_width => Some(Fact::Mem { - ty: *ty, - min_offset: *min_offset, - max_offset: *max_offset, - nullable: true, - }), - - _ => None, - }; - trace!("union({lhs:?}, {rhs:?}) -> {result:?}"); - result - } -} - -fn max_value_for_width(bits: u16) -> u64 { - assert!(bits <= 64); - if bits == 64 { - u64::MAX - } else { - (1u64 << bits) - 1 - } -} - -/// Top-level entry point after compilation: this checks the facts in -/// VCode. -pub fn check_vcode_facts( - f: &ir::Function, - vcode: &mut VCode, - backend: &B, -) -> PccResult<()> { - let ctx = FactContext::new(f, backend.triple().pointer_width().unwrap().bits().into()); - - // Check that individual instructions are valid according to input - // facts, and support the stated output facts. - for block in 0..vcode.num_blocks() { - let block = BlockIndex::new(block); - let mut flow_state = B::FactFlowState::default(); - for inst in vcode.block_insns(block).iter() { - // Check any output facts on this inst. - if let Err(e) = backend.check_fact(&ctx, vcode, inst, &mut flow_state) { - log::info!("Error checking instruction: {:?}", vcode[inst]); - return Err(e); - } - - // If this is a branch, check that all block arguments subsume - // the assumed facts on the blockparams of successors. - if vcode.is_branch(inst) { - for (succ_idx, succ) in vcode.block_succs(block).iter().enumerate() { - for (arg, param) in vcode - .branch_blockparams(block, inst, succ_idx) - .iter() - .zip(vcode.block_params(*succ).iter()) - { - let arg_fact = vcode.vreg_fact(*arg); - let param_fact = vcode.vreg_fact(*param); - if !ctx.subsumes_fact_optionals(arg_fact, param_fact) { - return Err(PccError::UnsupportedBlockparam); - } - } - } - } - } - } - Ok(()) -} diff --git a/cranelift/codegen/src/isa/aarch64/inst.isle b/cranelift/codegen/src/isa/aarch64/inst.isle index c4031ccef0d1..8607a0344d0a 100644 --- a/cranelift/codegen/src/isa/aarch64/inst.isle +++ b/cranelift/codegen/src/isa/aarch64/inst.isle @@ -3618,23 +3618,17 @@ ;; are zero-extending the value. (rule 3 (imm (integral_ty ty) (ImmExtend.Zero) k) (if-let n (move_wide_const_from_u64 ty k)) - (add_range_fact - (movz n (operand_size ty)) - 64 k k)) + (movz n (operand_size ty))) (rule 2 (imm (integral_ty (ty_32_or_64 ty)) (ImmExtend.Zero) k) (if-let n (move_wide_const_from_inverted_u64 ty k)) - (add_range_fact - (movn n (operand_size ty)) - 64 k k)) + (movn n (operand_size ty))) ;; Weird logical-instruction immediate in ORI using zero register; to simplify, ;; we only match when we are zero-extending the value. (rule 1 (imm (integral_ty ty) (ImmExtend.Zero) k) (if-let n (imm_logic_from_u64 ty k)) (if-let m (imm_size_from_type ty)) - (add_range_fact - (orr_imm ty (zero_reg) n) - m k k)) + (orr_imm ty (zero_reg) n)) (decl load_constant_full (Type ImmExtend OperandSize u64) Reg) (extern constructor load_constant_full load_constant_full) diff --git a/cranelift/codegen/src/isa/aarch64/lower.rs b/cranelift/codegen/src/isa/aarch64/lower.rs index 6d51a380433f..27c48ec54777 100644 --- a/cranelift/codegen/src/isa/aarch64/lower.rs +++ b/cranelift/codegen/src/isa/aarch64/lower.rs @@ -9,11 +9,9 @@ use crate::ir::Inst as IRInst; use crate::ir::condcodes::{FloatCC, IntCC}; -use crate::ir::pcc::{FactContext, PccResult}; use crate::ir::{Opcode, Value}; use crate::isa::aarch64::AArch64Backend; use crate::isa::aarch64::inst::*; -use crate::isa::aarch64::pcc; use crate::machinst::lower::*; use crate::machinst::*; @@ -130,16 +128,4 @@ impl LowerBackend for AArch64Backend { fn maybe_pinned_reg(&self) -> Option { Some(regs::pinned_reg()) } - - fn check_fact( - &self, - ctx: &FactContext<'_>, - vcode: &mut VCode, - inst: InsnIndex, - state: &mut pcc::FactFlowState, - ) -> PccResult<()> { - pcc::check(ctx, vcode, inst, state) - } - - type FactFlowState = pcc::FactFlowState; } diff --git a/cranelift/codegen/src/isa/aarch64/lower/isle.rs b/cranelift/codegen/src/isa/aarch64/lower/isle.rs index 3e82af2a9c8e..c48a50007aeb 100644 --- a/cranelift/codegen/src/isa/aarch64/lower/isle.rs +++ b/cranelift/codegen/src/isa/aarch64/lower/isle.rs @@ -381,10 +381,6 @@ impl Context for IsleContext<'_, '_, MInst, AArch64Backend> { }, size, }); - if self.backend.flags.enable_pcc() { - self.lower_ctx - .add_range_fact(rd.to_reg(), 64, running_value, running_value); - } // Emit a `movk` instruction for each remaining slice of the desired // constant that does not match the initial value constructed above. @@ -400,10 +396,6 @@ impl Context for IsleContext<'_, '_, MInst, AArch64Backend> { size, }); running_value = replace(running_value, bits, shift); - if self.backend.flags.enable_pcc() { - self.lower_ctx - .add_range_fact(rd.to_reg(), 64, running_value, running_value); - } } } diff --git a/cranelift/codegen/src/isa/aarch64/mod.rs b/cranelift/codegen/src/isa/aarch64/mod.rs index e90a8aecfa57..b112358cd77d 100644 --- a/cranelift/codegen/src/isa/aarch64/mod.rs +++ b/cranelift/codegen/src/isa/aarch64/mod.rs @@ -22,7 +22,6 @@ use target_lexicon::{Aarch64Architecture, Architecture, OperatingSystem, Triple} mod abi; pub mod inst; mod lower; -mod pcc; pub mod settings; use self::inst::EmitInfo; diff --git a/cranelift/codegen/src/isa/aarch64/pcc.rs b/cranelift/codegen/src/isa/aarch64/pcc.rs deleted file mode 100644 index e5ee1919803e..000000000000 --- a/cranelift/codegen/src/isa/aarch64/pcc.rs +++ /dev/null @@ -1,570 +0,0 @@ -//! Proof-carrying code checking for AArch64 VCode. - -use crate::ir::MemFlags; -use crate::ir::pcc::*; -use crate::ir::types::*; -use crate::isa::aarch64::inst::Inst; -use crate::isa::aarch64::inst::args::{Cond, PairAMode, ShiftOp}; -use crate::isa::aarch64::inst::regs::zero_reg; -use crate::isa::aarch64::inst::{ALUOp, MoveWideOp}; -use crate::isa::aarch64::inst::{AMode, ExtendOp}; -use crate::machinst::Reg; -use crate::machinst::pcc::*; -use crate::machinst::{InsnIndex, VCode}; -use crate::trace; - -fn extend_fact(ctx: &FactContext, value: &Fact, mode: ExtendOp) -> Option { - match mode { - ExtendOp::UXTB => ctx.uextend(value, 8, 64), - ExtendOp::UXTH => ctx.uextend(value, 16, 64), - ExtendOp::UXTW => ctx.uextend(value, 32, 64), - ExtendOp::UXTX => Some(value.clone()), - ExtendOp::SXTB => ctx.sextend(value, 8, 64), - ExtendOp::SXTH => ctx.sextend(value, 16, 64), - ExtendOp::SXTW => ctx.sextend(value, 32, 64), - ExtendOp::SXTX => None, - } -} - -/// Flow-state between facts. -#[derive(Clone, Debug, Default)] -pub struct FactFlowState { - cmp_flags: Option<(Fact, Fact)>, -} - -pub(crate) fn check( - ctx: &FactContext, - vcode: &mut VCode, - inst_idx: InsnIndex, - state: &mut FactFlowState, -) -> PccResult<()> { - let inst = &vcode[inst_idx]; - trace!("Checking facts on inst: {:?}", inst); - - // We only persist flag state for one instruction, because we - // can't exhaustively enumerate all flags-effecting ops; so take - // the `cmp_state` here and perhaps use it below but don't let it - // remain. - let cmp_flags = state.cmp_flags.take(); - trace!(" * with cmp_flags = {cmp_flags:?}"); - - match *inst { - Inst::Args { .. } => { - // Defs on the args have "axiomatic facts": we trust the - // ABI code to pass through the values unharmed, so the - // facts given to us in the CLIF should still be true. - Ok(()) - } - Inst::ULoad8 { rd, ref mem, flags } - | Inst::SLoad8 { rd, ref mem, flags } - | Inst::ULoad16 { rd, ref mem, flags } - | Inst::SLoad16 { rd, ref mem, flags } - | Inst::ULoad32 { rd, ref mem, flags } - | Inst::SLoad32 { rd, ref mem, flags } - | Inst::ULoad64 { rd, ref mem, flags } => { - let access_ty = inst.mem_type().unwrap(); - check_load(ctx, Some(rd.to_reg()), flags, mem, vcode, access_ty) - } - Inst::FpuLoad16 { ref mem, flags, .. } - | Inst::FpuLoad32 { ref mem, flags, .. } - | Inst::FpuLoad64 { ref mem, flags, .. } - | Inst::FpuLoad128 { ref mem, flags, .. } => { - let access_ty = inst.mem_type().unwrap(); - check_load(ctx, None, flags, mem, vcode, access_ty) - } - Inst::LoadP64 { ref mem, flags, .. } => check_load_pair(ctx, flags, mem, vcode, 16), - Inst::FpuLoadP64 { ref mem, flags, .. } => check_load_pair(ctx, flags, mem, vcode, 16), - Inst::FpuLoadP128 { ref mem, flags, .. } => check_load_pair(ctx, flags, mem, vcode, 32), - Inst::VecLoadReplicate { - rn, flags, size, .. - } => check_load_addr(ctx, flags, rn, vcode, size.lane_size().ty()), - Inst::LoadAcquire { - access_ty, - rn, - flags, - .. - } => check_load_addr(ctx, flags, rn, vcode, access_ty), - - Inst::Store8 { rd, ref mem, flags } - | Inst::Store16 { rd, ref mem, flags } - | Inst::Store32 { rd, ref mem, flags } - | Inst::Store64 { rd, ref mem, flags } => { - let access_ty = inst.mem_type().unwrap(); - check_store(ctx, Some(rd), flags, mem, vcode, access_ty) - } - Inst::FpuStore16 { ref mem, flags, .. } - | Inst::FpuStore32 { ref mem, flags, .. } - | Inst::FpuStore64 { ref mem, flags, .. } - | Inst::FpuStore128 { ref mem, flags, .. } => { - let access_ty = inst.mem_type().unwrap(); - check_store(ctx, None, flags, mem, vcode, access_ty) - } - Inst::StoreP64 { ref mem, flags, .. } => check_store_pair(ctx, flags, mem, vcode, 16), - Inst::FpuStoreP64 { ref mem, flags, .. } => check_store_pair(ctx, flags, mem, vcode, 16), - Inst::FpuStoreP128 { ref mem, flags, .. } => check_store_pair(ctx, flags, mem, vcode, 32), - Inst::StoreRelease { - access_ty, - rn, - flags, - .. - } => check_store_addr(ctx, flags, rn, vcode, access_ty), - - Inst::AluRRR { - alu_op: ALUOp::Add | ALUOp::AddS, - size, - rd, - rn, - rm, - } => check_binop(ctx, vcode, 64, rd, rn, rm, |rn, rm| { - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.add(rn, rm, size.bits().into()), - ) - }), - Inst::AluRRImm12 { - alu_op: ALUOp::Add | ALUOp::AddS, - size, - rd, - rn, - imm12, - } => check_unop(ctx, vcode, 64, rd, rn, |rn| { - let imm12: i64 = imm12.value().into(); - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.offset(&rn, size.bits().into(), imm12), - ) - }), - Inst::AluRRImm12 { - alu_op: ALUOp::Sub, - size, - rd, - rn, - imm12, - } => check_unop(ctx, vcode, 64, rd, rn, |rn| { - let imm12: i64 = imm12.value().into(); - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.offset(&rn, size.bits().into(), -imm12), - ) - }), - Inst::AluRRR { - alu_op: ALUOp::Sub, - size, - rd, - rn, - rm, - } => check_binop(ctx, vcode, 64, rd, rn, rm, |rn, rm| { - if let Some(k) = rm.as_const(64) { - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.offset(rn, size.bits().into(), -(k as i64)), - ) - } else { - clamp_range(ctx, 64, size.bits().into(), None) - } - }), - Inst::AluRRRShift { - alu_op: ALUOp::Add | ALUOp::AddS, - size, - rd, - rn, - rm, - shiftop, - } if shiftop.op() == ShiftOp::LSL && has_fact(vcode, rn) && has_fact(vcode, rm) => { - check_binop(ctx, vcode, 64, rd, rn, rm, |rn, rm| { - let rm_shifted = fail_if_missing(ctx.shl( - &rm, - size.bits().into(), - shiftop.amt().value().into(), - ))?; - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.add(&rn, &rm_shifted, size.bits().into()), - ) - }) - } - Inst::AluRRRExtend { - alu_op: ALUOp::Add | ALUOp::AddS, - size, - rd, - rn, - rm, - extendop, - } if has_fact(vcode, rn) && has_fact(vcode, rm) => { - check_binop(ctx, vcode, 64, rd, rn, rm, |rn, rm| { - let rm_extended = fail_if_missing(extend_fact(ctx, rm, extendop))?; - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.add(&rn, &rm_extended, size.bits().into()), - ) - }) - } - Inst::AluRRImmShift { - alu_op: ALUOp::Lsl, - size, - rd, - rn, - immshift, - } if has_fact(vcode, rn) => check_unop(ctx, vcode, 64, rd, rn, |rn| { - clamp_range( - ctx, - 64, - size.bits().into(), - ctx.shl(&rn, size.bits().into(), immshift.value().into()), - ) - }), - Inst::Extend { - rd, - rn, - signed: false, - from_bits, - to_bits, - } if has_fact(vcode, rn) => check_unop(ctx, vcode, 64, rd, rn, |rn| { - clamp_range( - ctx, - 64, - to_bits.into(), - ctx.uextend(&rn, from_bits.into(), to_bits.into()), - ) - }), - - Inst::AluRRR { - alu_op: ALUOp::SubS, - size, - rd, - rn, - rm, - } if rd.to_reg() == zero_reg() => { - // Compare. - let rn = get_fact_or_default(vcode, rn, size.bits().into()); - let rm = get_fact_or_default(vcode, rm, size.bits().into()); - state.cmp_flags = Some((rn, rm)); - Ok(()) - } - - Inst::AluRRImmLogic { - alu_op: ALUOp::Orr, - size, - rd, - rn, - imml, - } if rn == zero_reg() => { - let constant = imml.value(); - check_constant(ctx, vcode, rd, size.bits().into(), constant) - } - - Inst::AluRRR { rd, size, .. } - | Inst::AluRRImm12 { rd, size, .. } - | Inst::AluRRRShift { rd, size, .. } - | Inst::AluRRRExtend { rd, size, .. } - | Inst::AluRRImmLogic { rd, size, .. } - | Inst::AluRRImmShift { rd, size, .. } => check_output(ctx, vcode, rd, &[], |_vcode| { - clamp_range(ctx, 64, size.bits().into(), None) - }), - - Inst::Extend { - rd, - from_bits, - to_bits, - .. - } => check_output(ctx, vcode, rd, &[], |_vcode| { - clamp_range(ctx, to_bits.into(), from_bits.into(), None) - }), - - Inst::MovWide { - op: MoveWideOp::MovZ, - imm, - size: _, - rd, - } => { - let constant = u64::from(imm.bits) << (imm.shift * 16); - check_constant(ctx, vcode, rd, 64, constant) - } - - Inst::MovWide { - op: MoveWideOp::MovN, - imm, - size, - rd, - } => { - let constant = !(u64::from(imm.bits) << (imm.shift * 16)) & size.max_value(); - check_constant(ctx, vcode, rd, 64, constant) - } - - Inst::MovK { rd, rn, imm, .. } => { - let input = get_fact_or_default(vcode, rn, 64); - if let Some(input_constant) = input.as_const(64) { - let mask = 0xffff << (imm.shift * 16); - let constant = u64::from(imm.bits) << (imm.shift * 16); - let constant = (input_constant & !mask) | constant; - check_constant(ctx, vcode, rd, 64, constant) - } else { - check_output(ctx, vcode, rd, &[], |_vcode| { - Ok(Some(Fact::max_range_for_width(64))) - }) - } - } - - Inst::CSel { rd, cond, rn, rm } - if (cond == Cond::Hs || cond == Cond::Hi) && cmp_flags.is_some() => - { - let (cmp_lhs, cmp_rhs) = cmp_flags.unwrap(); - trace!("CSel: cmp {cond:?} ({cmp_lhs:?}, {cmp_rhs:?})"); - - check_output(ctx, vcode, rd, &[], |vcode| { - // We support transitivity-based reasoning. If the - // comparison establishes that - // - // (x+K1) <= (y+K2) - // - // then on the true-side of the select we can edit the maximum - // in a DynamicMem or DynamicRange by replacing x's with y's - // with appropriate offsets -- this widens the range. - // - // Likewise, on the false-side of the select we can - // replace y's with x's -- this also widens the range. On - // the false side we know the inequality is strict, so we - // can offset by one. - - // True side: lhs >= rhs (Hs) or lhs > rhs (Hi). - let rn = get_fact_or_default(vcode, rn, 64); - let lhs_kind = match cond { - Cond::Hs => InequalityKind::Loose, - Cond::Hi => InequalityKind::Strict, - _ => unreachable!(), - }; - let rn = ctx.apply_inequality(&rn, &cmp_lhs, &cmp_rhs, lhs_kind); - // false side: rhs < lhs (Hs) or rhs <= lhs (Hi). - let rm = get_fact_or_default(vcode, rm, 64); - let rhs_kind = match cond { - Cond::Hs => InequalityKind::Strict, - Cond::Hi => InequalityKind::Loose, - _ => unreachable!(), - }; - let rm = ctx.apply_inequality(&rm, &cmp_rhs, &cmp_lhs, rhs_kind); - let union = ctx.union(&rn, &rm); - // Union the two facts. - clamp_range(ctx, 64, 64, union) - }) - } - - _ if vcode.inst_defines_facts(inst_idx) => Err(PccError::UnsupportedFact), - - _ => Ok(()), - } -} - -fn check_load( - ctx: &FactContext, - rd: Option, - flags: MemFlags, - addr: &AMode, - vcode: &VCode, - ty: Type, -) -> PccResult<()> { - let result_fact = rd.and_then(|rd| vcode.vreg_fact(rd.into())); - let bits = u16::try_from(ty.bits()).unwrap(); - check_addr( - ctx, - flags, - addr, - vcode, - ty, - LoadOrStore::Load { - result_fact, - from_bits: bits, - to_bits: bits, - }, - ) -} - -fn check_store( - ctx: &FactContext, - rd: Option, - flags: MemFlags, - addr: &AMode, - vcode: &VCode, - ty: Type, -) -> PccResult<()> { - let stored_fact = rd.and_then(|rd| vcode.vreg_fact(rd.into())); - check_addr( - ctx, - flags, - addr, - vcode, - ty, - LoadOrStore::Store { stored_fact }, - ) -} - -fn check_addr<'a>( - ctx: &FactContext, - flags: MemFlags, - addr: &AMode, - vcode: &VCode, - ty: Type, - op: LoadOrStore<'a>, -) -> PccResult<()> { - if !flags.checked() { - return Ok(()); - } - - trace!("check_addr: {:?}", addr); - - let check = |addr: &Fact, ty: Type| -> PccResult<()> { - match op { - LoadOrStore::Load { - result_fact, - from_bits, - to_bits, - } => { - let loaded_fact = - clamp_range(ctx, to_bits, from_bits, ctx.load(addr, ty)?.cloned())?; - trace!( - "checking a load: loaded_fact = {loaded_fact:?} result_fact = {result_fact:?}" - ); - if ctx.subsumes_fact_optionals(loaded_fact.as_ref(), result_fact) { - Ok(()) - } else { - Err(PccError::UnsupportedFact) - } - } - LoadOrStore::Store { stored_fact } => ctx.store(addr, ty, stored_fact), - } - }; - - match addr { - &AMode::RegReg { rn, rm } => { - let rn = get_fact_or_default(vcode, rn, 64); - let rm = get_fact_or_default(vcode, rm, 64); - let sum = fail_if_missing(ctx.add(&rn, &rm, 64))?; - trace!("rn = {rn:?} rm = {rm:?} sum = {sum:?}"); - check(&sum, ty) - } - &AMode::RegScaled { rn, rm } => { - let rn = get_fact_or_default(vcode, rn, 64); - let rm = get_fact_or_default(vcode, rm, 64); - let rm_scaled = fail_if_missing(ctx.scale(&rm, 64, ty.bytes()))?; - let sum = fail_if_missing(ctx.add(&rn, &rm_scaled, 64))?; - check(&sum, ty) - } - &AMode::RegScaledExtended { rn, rm, extendop } => { - let rn = get_fact_or_default(vcode, rn, 64); - let rm = get_fact_or_default(vcode, rm, 64); - let rm_extended = fail_if_missing(extend_fact(ctx, &rm, extendop))?; - let rm_scaled = fail_if_missing(ctx.scale(&rm_extended, 64, ty.bytes()))?; - let sum = fail_if_missing(ctx.add(&rn, &rm_scaled, 64))?; - check(&sum, ty) - } - &AMode::RegExtended { rn, rm, extendop } => { - let rn = get_fact_or_default(vcode, rn, 64); - let rm = get_fact_or_default(vcode, rm, 64); - let rm_extended = fail_if_missing(extend_fact(ctx, &rm, extendop))?; - let sum = fail_if_missing(ctx.add(&rn, &rm_extended, 64))?; - check(&sum, ty)?; - Ok(()) - } - &AMode::Unscaled { rn, simm9 } => { - let rn = get_fact_or_default(vcode, rn, 64); - let sum = fail_if_missing(ctx.offset(&rn, 64, simm9.value.into()))?; - check(&sum, ty) - } - &AMode::UnsignedOffset { rn, uimm12 } => { - let rn = get_fact_or_default(vcode, rn, 64); - // N.B.: the architecture scales the immediate in the - // encoded instruction by the size of the loaded type, so - // e.g. an offset field of 4095 can mean a load of offset - // 32760 (= 4095 * 8) for I64s. The `UImm12Scaled` type - // stores the *scaled* value, so we don't need to multiply - // (again) by the type's size here. - let offset: u64 = uimm12.value().into(); - // This `unwrap()` will always succeed because the value - // will always be positive and much smaller than - // `i64::MAX` (see above). - let sum = fail_if_missing(ctx.offset(&rn, 64, i64::try_from(offset).unwrap()))?; - check(&sum, ty) - } - &AMode::Label { .. } | &AMode::Const { .. } => { - // Always accept: labels and constants must be within the - // generated code (else they won't be resolved). - Ok(()) - } - &AMode::RegOffset { rn, off, .. } => { - let rn = get_fact_or_default(vcode, rn, 64); - let sum = fail_if_missing(ctx.offset(&rn, 64, off))?; - check(&sum, ty) - } - &AMode::SPOffset { .. } - | &AMode::FPOffset { .. } - | &AMode::IncomingArg { .. } - | &AMode::SlotOffset { .. } - | &AMode::SPPostIndexed { .. } - | &AMode::SPPreIndexed { .. } => { - // We trust ABI code (for now!) and no lowering rules - // lower input value accesses directly to these. - Ok(()) - } - } -} - -fn check_load_pair( - _ctx: &FactContext, - _flags: MemFlags, - _addr: &PairAMode, - _vcode: &VCode, - _size: u8, -) -> PccResult<()> { - Err(PccError::UnimplementedInst) -} - -fn check_store_pair( - _ctx: &FactContext, - _flags: MemFlags, - _addr: &PairAMode, - _vcode: &VCode, - _size: u8, -) -> PccResult<()> { - Err(PccError::UnimplementedInst) -} - -fn check_load_addr( - ctx: &FactContext, - flags: MemFlags, - reg: Reg, - vcode: &VCode, - ty: Type, -) -> PccResult<()> { - if !flags.checked() { - return Ok(()); - } - let fact = get_fact_or_default(vcode, reg, 64); - let _output_fact = ctx.load(&fact, ty)?; - Ok(()) -} - -fn check_store_addr( - ctx: &FactContext, - flags: MemFlags, - reg: Reg, - vcode: &VCode, - ty: Type, -) -> PccResult<()> { - if !flags.checked() { - return Ok(()); - } - let fact = get_fact_or_default(vcode, reg, 64); - let _output_fact = ctx.store(&fact, ty, None)?; - Ok(()) -} diff --git a/cranelift/codegen/src/isa/pulley_shared/lower.rs b/cranelift/codegen/src/isa/pulley_shared/lower.rs index 8dd5a0cea50c..2039c7de8dd3 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower.rs +++ b/cranelift/codegen/src/isa/pulley_shared/lower.rs @@ -31,6 +31,4 @@ where // Pulley does not support this feature right now. None } - - type FactFlowState = (); } diff --git a/cranelift/codegen/src/isa/riscv64/inst/args.rs b/cranelift/codegen/src/isa/riscv64/inst/args.rs index 918a4854b3a3..cc6e668b911a 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/args.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/args.rs @@ -1563,8 +1563,11 @@ impl AtomicOP { ///Atomic Memory ordering. #[derive(Copy, Clone, Debug)] pub enum AMO { + #[allow(dead_code, reason = "used only in emit tests for now")] Relax = 0b00, + #[allow(dead_code, reason = "used only in emit tests for now")] Release = 0b01, + #[allow(dead_code, reason = "used only in emit tests for now")] Acquire = 0b10, SeqCst = 0b11, } diff --git a/cranelift/codegen/src/isa/riscv64/inst/vector.rs b/cranelift/codegen/src/isa/riscv64/inst/vector.rs index 269e6481b506..bc803939f172 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/vector.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/vector.rs @@ -1,4 +1,3 @@ -use crate::Reg; use crate::isa::riscv64::lower::isle::generated_code::VecAluOpRRRR; use crate::isa::riscv64::lower::isle::generated_code::{ VecAMode, VecAluOpRImm5, VecAluOpRR, VecAluOpRRImm5, VecAluOpRRR, VecAluOpRRRImm5, VecAvl, @@ -1060,12 +1059,6 @@ impl fmt::Display for VecAluOpRImm5 { } impl VecAMode { - pub fn get_base_register(&self) -> Option { - match self { - VecAMode::UnitStride { base, .. } => base.get_base_register(), - } - } - pub fn get_operands(&mut self, collector: &mut impl OperandVisitor) { match self { VecAMode::UnitStride { base, .. } => base.get_operands(collector), diff --git a/cranelift/codegen/src/isa/riscv64/lower.rs b/cranelift/codegen/src/isa/riscv64/lower.rs index 117778f820b3..ae56a1de4908 100644 --- a/cranelift/codegen/src/isa/riscv64/lower.rs +++ b/cranelift/codegen/src/isa/riscv64/lower.rs @@ -30,6 +30,4 @@ impl LowerBackend for Riscv64Backend { // right now riscv64 not support this feature. None } - - type FactFlowState = (); } diff --git a/cranelift/codegen/src/isa/s390x/lower.rs b/cranelift/codegen/src/isa/s390x/lower.rs index 9af0b96147e5..2577c6372673 100644 --- a/cranelift/codegen/src/isa/s390x/lower.rs +++ b/cranelift/codegen/src/isa/s390x/lower.rs @@ -25,6 +25,4 @@ impl LowerBackend for S390xBackend { ) -> Option<()> { isle::lower_branch(ctx, self, ir_inst, targets) } - - type FactFlowState = (); } diff --git a/cranelift/codegen/src/isa/x64/inst.isle b/cranelift/codegen/src/isa/x64/inst.isle index 813d087a726c..113c476c24e6 100644 --- a/cranelift/codegen/src/isa/x64/inst.isle +++ b/cranelift/codegen/src/isa/x64/inst.isle @@ -1219,7 +1219,7 @@ ;; even not generate a zero-extended move in this case. (rule 2 (extend_to_gpr src @ (value_type $I32) $I64 (ExtendKind.Zero)) (if-let true (value32_zeros_upper32 src)) - (add_range_fact src 64 0 0xffff_ffff)) + src) ;; Both extend instructions are guaranteed to load exactly the source type's size. ;; So we can use `sinkable_load_exact` here to sink loads for small types (<= 16 bits). diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs index a000f8ece143..346ab7558195 100644 --- a/cranelift/codegen/src/isa/x64/lower.rs +++ b/cranelift/codegen/src/isa/x64/lower.rs @@ -3,14 +3,12 @@ // ISLE integration glue. pub(super) mod isle; -use crate::ir::pcc::{FactContext, PccResult}; use crate::ir::{ Endianness, ExternalName, Inst as IRInst, InstructionData, LibCall, Opcode, Type, types, }; use crate::isa::x64::abi::*; use crate::isa::x64::inst::args::*; use crate::isa::x64::inst::*; -use crate::isa::x64::pcc; use crate::isa::{CallConv, x64::X64Backend}; use crate::machinst::lower::*; use crate::machinst::*; @@ -338,16 +336,4 @@ impl LowerBackend for X64Backend { fn maybe_pinned_reg(&self) -> Option { Some(regs::pinned_reg()) } - - fn check_fact( - &self, - ctx: &FactContext<'_>, - vcode: &mut VCode, - inst: InsnIndex, - state: &mut pcc::FactFlowState, - ) -> PccResult<()> { - pcc::check(ctx, vcode, inst, state) - } - - type FactFlowState = pcc::FactFlowState; } diff --git a/cranelift/codegen/src/isa/x64/mod.rs b/cranelift/codegen/src/isa/x64/mod.rs index a1cdcb3aeaeb..15eb736f479d 100644 --- a/cranelift/codegen/src/isa/x64/mod.rs +++ b/cranelift/codegen/src/isa/x64/mod.rs @@ -25,7 +25,6 @@ use target_lexicon::Triple; mod abi; mod inst; mod lower; -mod pcc; pub mod settings; #[cfg(feature = "unwind")] diff --git a/cranelift/codegen/src/isa/x64/pcc.rs b/cranelift/codegen/src/isa/x64/pcc.rs deleted file mode 100644 index 09b356d69958..000000000000 --- a/cranelift/codegen/src/isa/x64/pcc.rs +++ /dev/null @@ -1,326 +0,0 @@ -//! Proof-carrying-code validation for x64 VCode. - -use crate::ir::pcc::*; -use crate::ir::types::*; -use crate::isa::x64::inst::Inst; -use crate::isa::x64::inst::args::{Amode, Gpr, RegMem, SyntheticAmode, ToWritableReg}; -use crate::machinst::pcc::*; -use crate::machinst::{InsnIndex, VCode}; -use crate::machinst::{Reg, Writable}; -use crate::trace; - -fn undefined_result( - ctx: &FactContext, - vcode: &mut VCode, - dst: Writable, - reg_bits: u16, - result_bits: u16, -) -> PccResult<()> { - check_output(ctx, vcode, dst.to_writable_reg(), &[], |_vcode| { - clamp_range(ctx, reg_bits, result_bits, None) - }) -} - -fn ensure_no_fact(vcode: &VCode, reg: Reg) -> PccResult<()> { - if vcode.vreg_fact(reg.into()).is_some() { - Err(PccError::UnsupportedFact) - } else { - Ok(()) - } -} - -/// Flow-state between facts. -#[derive(Clone, Debug, Default)] -pub(crate) struct FactFlowState { - cmp_flags: Option<(Fact, Fact)>, -} - -pub(crate) fn check( - ctx: &FactContext, - vcode: &mut VCode, - inst_idx: InsnIndex, - state: &mut FactFlowState, -) -> PccResult<()> { - trace!("Checking facts on inst: {:?}", vcode[inst_idx]); - - // We only persist flag state for one instruction, because we - // can't exhaustively enumerate all flags-effecting ops; so take - // the `cmp_state` here and perhaps use it below but don't let it - // remain. - let _cmp_flags = state.cmp_flags.take(); - - match vcode[inst_idx] { - Inst::Args { .. } => { - // Defs on the args have "axiomatic facts": we trust the - // ABI code to pass through the values unharmed, so the - // facts given to us in the CLIF should still be true. - Ok(()) - } - - Inst::CheckedSRemSeq { - dst_quotient, - dst_remainder, - .. - } => { - undefined_result(ctx, vcode, dst_quotient, 64, 64)?; - undefined_result(ctx, vcode, dst_remainder, 64, 64)?; - Ok(()) - } - - Inst::CheckedSRemSeq8 { dst, .. } => undefined_result(ctx, vcode, dst, 64, 64), - - Inst::MovFromPReg { dst, .. } => undefined_result(ctx, vcode, dst, 64, 64), - Inst::MovToPReg { .. } => Ok(()), - - Inst::XmmCmove { dst, .. } => ensure_no_fact(vcode, dst.to_writable_reg().to_reg()), - - Inst::StackProbeLoop { tmp, .. } => ensure_no_fact(vcode, tmp.to_reg()), - - Inst::CvtUint64ToFloatSeq { - dst, - tmp_gpr1, - tmp_gpr2, - .. - } => { - ensure_no_fact(vcode, dst.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp_gpr1.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp_gpr2.to_writable_reg().to_reg())?; - Ok(()) - } - - Inst::CvtFloatToSintSeq { - dst, - tmp_gpr, - tmp_xmm, - .. - } => { - undefined_result(ctx, vcode, dst, 64, 64)?; - ensure_no_fact(vcode, tmp_gpr.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp_xmm.to_writable_reg().to_reg())?; - Ok(()) - } - - Inst::CvtFloatToUintSeq { - dst, - tmp_gpr, - tmp_xmm, - tmp_xmm2, - .. - } => { - undefined_result(ctx, vcode, dst, 64, 64)?; - ensure_no_fact(vcode, tmp_gpr.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp_xmm.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp_xmm2.to_writable_reg().to_reg())?; - Ok(()) - } - - Inst::XmmMinMaxSeq { dst, .. } => ensure_no_fact(vcode, dst.to_writable_reg().to_reg()), - - Inst::CallKnown { .. } - | Inst::ReturnCallKnown { .. } - | Inst::JmpKnown { .. } - | Inst::WinchJmpIf { .. } - | Inst::JmpCond { .. } - | Inst::JmpCondOr { .. } - | Inst::TrapIf { .. } - | Inst::TrapIfAnd { .. } - | Inst::TrapIfOr { .. } => Ok(()), - Inst::Rets { .. } => Ok(()), - - Inst::ReturnCallUnknown { .. } => Ok(()), - - Inst::CallUnknown { ref info } => match &info.dest { - RegMem::Mem { addr } => { - check_load(ctx, None, addr, vcode, I64, 64)?; - Ok(()) - } - RegMem::Reg { .. } => Ok(()), - }, - - Inst::JmpTableSeq { tmp1, tmp2, .. } => { - ensure_no_fact(vcode, tmp1.to_reg())?; - ensure_no_fact(vcode, tmp2.to_reg())?; - Ok(()) - } - - Inst::LoadExtName { dst, .. } => { - ensure_no_fact(vcode, *dst.to_reg())?; - Ok(()) - } - - Inst::AtomicRmwSeq { - ref mem, - temp, - dst_old, - .. - } => { - ensure_no_fact(vcode, *dst_old.to_reg())?; - ensure_no_fact(vcode, *temp.to_reg())?; - check_store(ctx, None, mem, vcode, I64)?; - Ok(()) - } - - Inst::Atomic128RmwSeq { - ref mem, - temp_low, - temp_high, - dst_old_low, - dst_old_high, - .. - } => { - ensure_no_fact(vcode, *dst_old_low.to_reg())?; - ensure_no_fact(vcode, *dst_old_high.to_reg())?; - ensure_no_fact(vcode, *temp_low.to_reg())?; - ensure_no_fact(vcode, *temp_high.to_reg())?; - check_store(ctx, None, mem, vcode, I128)?; - Ok(()) - } - - Inst::Atomic128XchgSeq { - ref mem, - dst_old_low, - dst_old_high, - .. - } => { - ensure_no_fact(vcode, *dst_old_low.to_reg())?; - ensure_no_fact(vcode, *dst_old_high.to_reg())?; - check_store(ctx, None, mem, vcode, I128)?; - Ok(()) - } - - Inst::XmmUninitializedValue { dst } => { - ensure_no_fact(vcode, dst.to_writable_reg().to_reg()) - } - - Inst::GprUninitializedValue { dst } => { - ensure_no_fact(vcode, dst.to_writable_reg().to_reg()) - } - - Inst::ElfTlsGetAddr { dst, .. } | Inst::MachOTlsGetAddr { dst, .. } => { - ensure_no_fact(vcode, dst.to_writable_reg().to_reg()) - } - Inst::CoffTlsGetAddr { dst, tmp, .. } => { - ensure_no_fact(vcode, dst.to_writable_reg().to_reg())?; - ensure_no_fact(vcode, tmp.to_writable_reg().to_reg())?; - Ok(()) - } - - Inst::Unwind { .. } | Inst::DummyUse { .. } => Ok(()), - - Inst::StackSwitchBasic { .. } => Err(PccError::UnimplementedInst), - - Inst::LabelAddress { .. } => Err(PccError::UnimplementedInst), - - Inst::SequencePoint { .. } => Ok(()), - - Inst::External { .. } => Ok(()), // TODO: unsure what to do about this! - } -} - -fn check_load( - ctx: &FactContext, - dst: Option>, - src: &SyntheticAmode, - vcode: &VCode, - ty: Type, - to_bits: u16, -) -> PccResult> { - let result_fact = dst.and_then(|dst| vcode.vreg_fact(dst.to_reg().into())); - let from_bits = u16::try_from(ty.bits()).unwrap(); - check_mem( - ctx, - src, - vcode, - ty, - LoadOrStore::Load { - result_fact, - from_bits, - to_bits, - }, - ) -} - -fn check_store( - ctx: &FactContext, - data: Option, - dst: &SyntheticAmode, - vcode: &VCode, - ty: Type, -) -> PccResult<()> { - let stored_fact = data.and_then(|data| vcode.vreg_fact(data.into())); - check_mem(ctx, dst, vcode, ty, LoadOrStore::Store { stored_fact }).map(|_| ()) -} - -fn check_mem<'a>( - ctx: &FactContext, - amode: &SyntheticAmode, - vcode: &VCode, - ty: Type, - op: LoadOrStore<'a>, -) -> PccResult> { - let addr = match amode { - SyntheticAmode::Real(amode) if amode.get_flags().checked() => { - compute_addr(ctx, vcode, amode, 64).ok_or(PccError::MissingFact)? - } - _ => return Ok(None), - }; - - match op { - LoadOrStore::Load { - result_fact, - from_bits, - to_bits, - } => { - let loaded_fact = clamp_range(ctx, to_bits, from_bits, ctx.load(&addr, ty)?.cloned())?; - trace!( - "loaded_fact = {:?} result_fact = {:?}", - loaded_fact, result_fact - ); - if ctx.subsumes_fact_optionals(loaded_fact.as_ref(), result_fact) { - Ok(loaded_fact.clone()) - } else { - Err(PccError::UnsupportedFact) - } - } - LoadOrStore::Store { stored_fact } => { - ctx.store(&addr, ty, stored_fact)?; - Ok(None) - } - } -} - -fn compute_addr(ctx: &FactContext, vcode: &VCode, amode: &Amode, bits: u16) -> Option { - trace!("compute_addr: {:?}", amode); - match *amode { - Amode::ImmReg { simm32, base, .. } => { - let base = get_fact_or_default(vcode, base, bits); - trace!("base = {:?}", base); - let simm32: i64 = simm32.into(); - let simm32: u64 = simm32 as u64; - let offset = Fact::constant(bits, simm32); - let sum = ctx.add(&base, &offset, bits)?; - trace!("sum = {:?}", sum); - Some(sum) - } - Amode::ImmRegRegShift { - simm32, - base, - index, - shift, - .. - } => { - let base = get_fact_or_default(vcode, base.into(), bits); - let index = get_fact_or_default(vcode, index.into(), bits); - trace!("base = {:?} index = {:?}", base, index); - let shifted = ctx.shl(&index, bits, shift.into())?; - let sum = ctx.add(&base, &shifted, bits)?; - let simm32: i64 = simm32.into(); - let simm32: u64 = simm32 as u64; - let offset = Fact::constant(bits, simm32); - let sum = ctx.add(&sum, &offset, bits)?; - trace!("sum = {:?}", sum); - Some(sum) - } - Amode::RipRelative { .. } => None, - } -} diff --git a/cranelift/codegen/src/legalizer/globalvalue.rs b/cranelift/codegen/src/legalizer/globalvalue.rs index 45444d161934..ce7801624737 100644 --- a/cranelift/codegen/src/legalizer/globalvalue.rs +++ b/cranelift/codegen/src/legalizer/globalvalue.rs @@ -5,7 +5,8 @@ use super::WalkCommand; use crate::cursor::{Cursor, FuncCursor}; -use crate::ir::{self, InstBuilder, pcc::Fact}; +use crate::ir; +use crate::ir::InstBuilder; use crate::isa::TargetIsa; /// Expand a `global_value` instruction according to the definition of the global value. @@ -61,7 +62,7 @@ fn const_vector_scale( /// Expand a `global_value` instruction for a vmctx global. fn vmctx_addr( - global_value: ir::GlobalValue, + _global_value: ir::GlobalValue, inst: ir::Inst, func: &mut ir::Function, ) -> WalkCommand { @@ -76,15 +77,6 @@ fn vmctx_addr( func.dfg.change_to_alias(result, vmctx); func.layout.remove_inst(inst); - // If there was a fact on the GV, then copy it to the vmctx arg - // blockparam def. - if let Some(fact) = &func.global_value_facts[global_value] { - if func.dfg.facts[vmctx].is_none() { - let fact = fact.clone(); - func.dfg.facts[vmctx] = Some(fact); - } - } - // We removed the instruction, so `cursor.next_inst()` will fail if we // return `WalkCommand::Continue`; instead "revisit" the current // instruction, which will be the next instruction since we removed the @@ -104,18 +96,10 @@ fn iadd_imm_addr( // Get the value for the lhs. let lhs = pos.ins().global_value(global_type, base); - if let Some(fact) = &pos.func.global_value_facts[base] { - pos.func.dfg.facts[lhs] = Some(fact.clone()); - } // Generate the constant and attach a fact to the constant if // there is a fact on the base. let constant = pos.ins().iconst(global_type, offset); - if pos.func.global_value_facts[base].is_some() { - let bits = u16::try_from(global_type.bits()).unwrap(); - let unsigned_offset = offset as u64; // Safety: reinterpret i64 bits as u64. - pos.func.dfg.facts[constant] = Some(Fact::constant(bits, unsigned_offset)); - } // Simply replace the `global_value` instruction with an `iadd_imm`, reusing the result value. pos.func.dfg.replace(inst).iadd(lhs, constant); @@ -144,9 +128,6 @@ fn load_addr( // Get the value for the base. let base_addr = pos.ins().global_value(ptr_ty, base); - if let Some(fact) = &pos.func.global_value_facts[base] { - pos.func.dfg.facts[base_addr] = Some(fact.clone()); - } // Perform the load. pos.func diff --git a/cranelift/codegen/src/machinst/blockorder.rs b/cranelift/codegen/src/machinst/blockorder.rs index 671426e600b2..215b204eeee2 100644 --- a/cranelift/codegen/src/machinst/blockorder.rs +++ b/cranelift/codegen/src/machinst/blockorder.rs @@ -134,6 +134,7 @@ impl LoweredBlock { } /// The associated out-edge successor, if this is a critical edge. + #[cfg(test)] pub fn out_edge(&self) -> Option { match self { &LoweredBlock::CriticalEdge { succ, .. } => Some(succ), diff --git a/cranelift/codegen/src/machinst/compile.rs b/cranelift/codegen/src/machinst/compile.rs index 84c68b337498..7747d804cafe 100644 --- a/cranelift/codegen/src/machinst/compile.rs +++ b/cranelift/codegen/src/machinst/compile.rs @@ -1,9 +1,7 @@ //! Compilation backend pipeline: optimized IR to VCode / binemit. -use crate::CodegenError; use crate::dominator_tree::DominatorTree; use crate::ir::Function; -use crate::ir::pcc; use crate::isa::TargetIsa; use crate::machinst::*; use crate::settings::RegallocAlgorithm; @@ -31,7 +29,7 @@ pub fn compile( crate::machinst::Lower::new(f, abi, emit_info, block_order, sigs, b.flags().clone())?; // Lower the IR. - let mut vcode = { + let vcode = { log::debug!( "Number of CLIF instructions to lower: {}", f.dfg.num_insts() @@ -49,11 +47,6 @@ pub fn compile( log::debug!("Number of lowered vcode blocks: {}", vcode.num_blocks()); trace!("vcode from lowering: \n{:?}", vcode); - // Perform validation of proof-carrying-code facts, if requested. - if b.flags().enable_pcc() { - pcc::check_vcode_facts(f, &mut vcode, b).map_err(CodegenError::Pcc)?; - } - // Perform register allocation. let regalloc_result = { let _tt = timing::regalloc(); diff --git a/cranelift/codegen/src/machinst/isle.rs b/cranelift/codegen/src/machinst/isle.rs index 53660767c51d..499b807f72f7 100644 --- a/cranelift/codegen/src/machinst/isle.rs +++ b/cranelift/codegen/src/machinst/isle.rs @@ -134,11 +134,6 @@ macro_rules! isle_lower_prelude_methods { .collect() } - #[inline] - fn ensure_in_vreg(&mut self, reg: Reg, ty: Type) -> Reg { - self.lower_ctx.ensure_in_vreg(reg, ty) - } - #[inline] fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg { regs.regs()[i] @@ -779,11 +774,6 @@ macro_rules! isle_lower_prelude_methods { targets.len() as u32 } - fn add_range_fact(&mut self, reg: Reg, bits: u16, min: u64, max: u64) -> Reg { - self.lower_ctx.add_range_fact(reg, bits, min, max); - reg - } - fn value_is_unused(&mut self, val: Value) -> bool { self.lower_ctx.value_is_unused(val) } diff --git a/cranelift/codegen/src/machinst/lower.rs b/cranelift/codegen/src/machinst/lower.rs index dc09f10c4d9c..84cc2c249df4 100644 --- a/cranelift/codegen/src/machinst/lower.rs +++ b/cranelift/codegen/src/machinst/lower.rs @@ -7,7 +7,6 @@ use crate::entity::SecondaryMap; use crate::inst_predicates::{has_lowering_side_effect, is_constant_64bit}; -use crate::ir::pcc::{Fact, FactContext, PccError, PccResult}; use crate::ir::{ ArgumentPurpose, Block, BlockArg, Constant, ConstantData, DataFlowGraph, ExternalName, Function, GlobalValue, GlobalValueData, Immediate, Inst, InstructionData, MemFlags, @@ -149,22 +148,6 @@ pub trait LowerBackend { fn maybe_pinned_reg(&self) -> Option { None } - - /// The type of state carried between `check_fact` invocations. - type FactFlowState: Default + Clone + Debug; - - /// Check any facts about an instruction, given VCode with facts - /// on VRegs. Takes mutable `VCode` so that it can propagate some - /// kinds of facts automatically. - fn check_fact( - &self, - _ctx: &FactContext<'_>, - _vcode: &mut VCode, - _inst: InsnIndex, - _state: &mut Self::FactFlowState, - ) -> PccResult<()> { - Err(PccError::UnimplementedBackend) - } } /// Machine-independent lowering driver / machine-instruction container. Maintains a correspondence @@ -408,7 +391,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> { for ¶m in f.dfg.block_params(bb) { let ty = f.dfg.value_type(param); if value_regs[param].is_invalid() { - let regs = vregs.alloc_with_maybe_fact(ty, f.dfg.facts[param].clone())?; + let regs = vregs.alloc(ty)?; value_regs[param] = regs; trace!("bb {} param {}: regs {:?}", bb, param, regs); } @@ -417,7 +400,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> { for &result in f.dfg.inst_results(inst) { let ty = f.dfg.value_type(result); if value_regs[result].is_invalid() && !ty.is_invalid() { - let regs = vregs.alloc_with_maybe_fact(ty, f.dfg.facts[result].clone())?; + let regs = vregs.alloc(ty)?; value_regs[result] = regs; trace!( "bb {} inst {} ({:?}): result {} regs {:?}", @@ -539,10 +522,6 @@ impl<'func, I: VCodeInst> Lower<'func, I> { self.vcode.sigs_mut() } - pub fn vregs_mut(&mut self) -> &mut VRegAllocator { - &mut self.vregs - } - fn gen_arg_setup(&mut self) { if let Some(entry_bb) = self.f.layout.entry_block() { trace!( @@ -1650,18 +1629,6 @@ impl<'func, I: VCodeInst> Lower<'func, I> { regs } - - /// Get the ValueRegs for the edge-defined values for special - /// try-call-return block arguments. - pub fn try_call_return_defs(&mut self, ir_inst: Inst) -> &[ValueRegs>] { - &self.try_call_rets.get(&ir_inst).unwrap()[..] - } - - /// Get the Regs for the edge-defined values for special - /// try-call-return exception payload arguments. - pub fn try_call_exception_defs(&mut self, ir_inst: Inst) -> &[Writable] { - &self.try_call_payloads.get(&ir_inst).unwrap()[..] - } } /// Codegen primitives: allocate temps, emit instructions, set result registers, @@ -1672,11 +1639,6 @@ impl<'func, I: VCodeInst> Lower<'func, I> { writable_value_regs(self.vregs.alloc_with_deferred_error(ty)) } - /// Get the current root instruction that we are lowering. - pub fn cur_inst(&self) -> Inst { - self.cur_inst.unwrap() - } - /// Emit a machine instruction. pub fn emit(&mut self, mach_inst: I) { trace!("emit: {:?}", mach_inst); @@ -1721,33 +1683,6 @@ impl<'func, I: VCodeInst> Lower<'func, I> { pub fn use_constant(&mut self, constant: VCodeConstantData) -> VCodeConstant { self.vcode.constants().insert(constant) } - - /// Cause the value in `reg` to be in a virtual reg, by copying it into a - /// new virtual reg if `reg` is a real reg. `ty` describes the type of the - /// value in `reg`. - pub fn ensure_in_vreg(&mut self, reg: Reg, ty: Type) -> Reg { - if reg.to_virtual_reg().is_some() { - reg - } else { - let new_reg = self.alloc_tmp(ty).only_reg().unwrap(); - self.emit(I::gen_move(new_reg, reg, ty)); - new_reg.to_reg() - } - } - - /// Add a range fact to a register, if no other fact is present. - pub fn add_range_fact(&mut self, reg: Reg, bit_width: u16, min: u64, max: u64) { - if self.flags.enable_pcc() { - self.vregs.set_fact_if_missing( - reg.to_virtual_reg().unwrap(), - Fact::Range { - bit_width, - min, - max, - }, - ); - } - } } #[cfg(test)] diff --git a/cranelift/codegen/src/machinst/mod.rs b/cranelift/codegen/src/machinst/mod.rs index c327803d5fb3..850b93f29fc3 100644 --- a/cranelift/codegen/src/machinst/mod.rs +++ b/cranelift/codegen/src/machinst/mod.rs @@ -84,7 +84,6 @@ pub use helpers::*; pub mod valueregs; pub use reg::*; pub use valueregs::*; -pub mod pcc; pub mod reg; /// A machine instruction. diff --git a/cranelift/codegen/src/machinst/pcc.rs b/cranelift/codegen/src/machinst/pcc.rs deleted file mode 100644 index 046b2ca3b3e2..000000000000 --- a/cranelift/codegen/src/machinst/pcc.rs +++ /dev/null @@ -1,166 +0,0 @@ -//! Common helpers for ISA-specific proof-carrying-code implementations. - -use crate::ir::pcc::{Fact, FactContext, PccError, PccResult}; -use crate::machinst::{Reg, VCode, VCodeInst, Writable}; -use crate::trace; - -pub(crate) fn get_fact_or_default(vcode: &VCode, reg: Reg, width: u16) -> Fact { - trace!( - "get_fact_or_default: reg {reg:?} -> {:?}", - vcode.vreg_fact(reg.into()) - ); - vcode - .vreg_fact(reg.into()) - .cloned() - .unwrap_or_else(|| Fact::max_range_for_width(width)) -} - -pub(crate) fn has_fact(vcode: &VCode, reg: Reg) -> bool { - vcode.vreg_fact(reg.into()).is_some() -} - -pub(crate) fn fail_if_missing(fact: Option) -> PccResult { - fact.ok_or(PccError::UnsupportedFact) -} - -pub(crate) fn clamp_range( - ctx: &FactContext, - to_bits: u16, - from_bits: u16, - fact: Option, -) -> PccResult> { - let max = if from_bits > 64 { - return Ok(None); - } else if from_bits == 64 { - u64::MAX - } else { - (1u64 << from_bits) - 1 - }; - trace!( - "clamp_range: fact {:?} from {} to {}", - fact, from_bits, to_bits - ); - Ok(fact - .and_then(|f| ctx.uextend(&f, from_bits, to_bits)) - .or_else(|| { - let result = Fact::Range { - bit_width: to_bits, - min: 0, - max, - }; - trace!(" -> clamping to {:?}", result); - Some(result) - })) -} - -pub(crate) fn check_subsumes(ctx: &FactContext, subsumer: &Fact, subsumee: &Fact) -> PccResult<()> { - check_subsumes_optionals(ctx, Some(subsumer), Some(subsumee)) -} - -pub(crate) fn check_subsumes_optionals( - ctx: &FactContext, - subsumer: Option<&Fact>, - subsumee: Option<&Fact>, -) -> PccResult<()> { - trace!( - "checking if derived fact {:?} subsumes stated fact {:?}", - subsumer, subsumee - ); - - if ctx.subsumes_fact_optionals(subsumer, subsumee) { - Ok(()) - } else { - Err(PccError::UnsupportedFact) - } -} - -pub(crate) fn check_output) -> PccResult>>( - ctx: &FactContext, - vcode: &mut VCode, - out: Writable, - ins: &[Reg], - f: F, -) -> PccResult<()> { - if let Some(fact) = vcode.vreg_fact(out.to_reg().into()) { - let result = f(vcode)?; - check_subsumes_optionals(ctx, result.as_ref(), Some(fact)) - } else if ins.iter().any(|r| { - vcode - .vreg_fact(r.into()) - .map(|fact| fact.propagates()) - .unwrap_or(false) - }) { - if let Ok(Some(fact)) = f(vcode) { - trace!("setting vreg {:?} to {:?}", out, fact); - vcode.set_vreg_fact(out.to_reg().into(), fact); - } - Ok(()) - } else { - Ok(()) - } -} - -pub(crate) fn check_unop PccResult>>( - ctx: &FactContext, - vcode: &mut VCode, - reg_width: u16, - out: Writable, - ra: Reg, - f: F, -) -> PccResult<()> { - check_output(ctx, vcode, out, &[ra], |vcode| { - let ra = get_fact_or_default(vcode, ra, reg_width); - f(&ra) - }) -} - -pub(crate) fn check_binop PccResult>>( - ctx: &FactContext, - vcode: &mut VCode, - reg_width: u16, - out: Writable, - ra: Reg, - rb: Reg, - f: F, -) -> PccResult<()> { - check_output(ctx, vcode, out, &[ra, rb], |vcode| { - let ra = get_fact_or_default(vcode, ra, reg_width); - let rb = get_fact_or_default(vcode, rb, reg_width); - f(&ra, &rb) - }) -} - -pub(crate) fn check_constant( - ctx: &FactContext, - vcode: &mut VCode, - out: Writable, - bit_width: u16, - value: u64, -) -> PccResult<()> { - let result = Fact::constant(bit_width, value); - if let Some(fact) = vcode.vreg_fact(out.to_reg().into()) { - check_subsumes(ctx, &result, fact) - } else { - trace!("setting vreg {:?} to {:?}", out, result); - vcode.set_vreg_fact(out.to_reg().into(), result); - Ok(()) - } -} - -/// The operation we're checking against an amode: either -/// -/// - a *load*, and we need to validate that the field's fact subsumes -/// the load result's fact, OR -/// -/// - a *store*, and we need to validate that the stored data's fact -/// subsumes the field's fact. -pub(crate) enum LoadOrStore<'a> { - Load { - result_fact: Option<&'a Fact>, - from_bits: u16, - to_bits: u16, - }, - Store { - stored_fact: Option<&'a Fact>, - }, -} diff --git a/cranelift/codegen/src/machinst/vcode.rs b/cranelift/codegen/src/machinst/vcode.rs index 2e8120a1999a..ff93f89aae69 100644 --- a/cranelift/codegen/src/machinst/vcode.rs +++ b/cranelift/codegen/src/machinst/vcode.rs @@ -19,7 +19,6 @@ use crate::CodegenError; use crate::FxHashMap; -use crate::ir::pcc::*; use crate::ir::{self, Constant, ConstantData, ValueLabel, types}; use crate::ranges::Ranges; use crate::timing; @@ -204,9 +203,6 @@ pub struct VCode { pub(crate) sigs: SigSet, - /// Facts on VRegs, for proof-carrying code verification. - facts: Vec>, - log2_min_function_alignment: u8, } @@ -566,7 +562,6 @@ impl VCodeBuilder { /// Build the final VCode. pub fn build(mut self, mut vregs: VRegAllocator) -> VCode { self.vcode.vreg_types = take(&mut vregs.vreg_types); - self.vcode.facts = take(&mut vregs.facts); if self.direction == VCodeBuildDirection::Backward { self.reverse_and_finalize(&vregs); @@ -591,19 +586,6 @@ impl VCodeBuilder { vregs.debug_assert_no_vreg_aliases( self.vcode.debug_value_labels.iter().map(|&(vreg, ..)| vreg), ); - // Facts are resolved eagerly during set_vreg_alias. - vregs.debug_assert_no_vreg_aliases( - self.vcode - .facts - .iter() - .zip(&vregs.vreg_types) - .enumerate() - .filter(|(_, (fact, _))| fact.is_some()) - .map(|(vreg, (_, &ty))| { - let (regclasses, _) = I::rc_for_type(ty).unwrap(); - VReg::new(vreg, regclasses[0]) - }), - ); self.vcode } @@ -668,7 +650,6 @@ impl VCode { emit_info, constants, debug_value_labels: vec![], - facts: vec![], log2_min_function_alignment, } } @@ -1528,31 +1509,6 @@ impl VCode { self.block_order.lowered_order()[block.index()].orig_block() } - /// Get the type of a VReg. - pub fn vreg_type(&self, vreg: VReg) -> Type { - self.vreg_types[vreg.vreg()] - } - - /// Get the fact, if any, for a given VReg. - pub fn vreg_fact(&self, vreg: VReg) -> Option<&Fact> { - self.facts[vreg.vreg()].as_ref() - } - - /// Set the fact for a given VReg. - pub fn set_vreg_fact(&mut self, vreg: VReg, fact: Fact) { - trace!("set fact on {}: {:?}", vreg, fact); - self.facts[vreg.vreg()] = Some(fact); - } - - /// Does a given instruction define any facts? - pub fn inst_defines_facts(&self, inst: InsnIndex) -> bool { - self.inst_operands(inst) - .iter() - .filter(|o| o.kind() == OperandKind::Def) - .map(|o| o.vreg()) - .any(|vreg| self.facts[vreg.vreg()].is_some()) - } - /// Get the user stack map associated with the given forward instruction index. pub fn get_user_stack_map(&self, inst: InsnIndex) -> Option<&ir::UserStackMap> { let index = inst.to_backwards_insn_index(self.num_insts()); @@ -1669,12 +1625,6 @@ impl Debug for VRegAllocator { writeln!(f, " {:?} := {:?}", Reg::from(key), Reg::from(*dest))?; } - for (vreg, fact) in self.facts.iter().enumerate() { - if let Some(fact) = fact { - writeln!(f, " v{vreg} ! {fact}")?; - } - } - writeln!(f, "}}") } } @@ -1712,15 +1662,6 @@ impl fmt::Debug for VCode { inst, self.insts[inst].pretty_print_inst(&mut state) )?; - if !self.operands.is_empty() { - for operand in self.inst_operands(InsnIndex::new(inst)) { - if operand.kind() == OperandKind::Def { - if let Some(fact) = &self.facts[operand.vreg().vreg()] { - writeln!(f, " v{} ! {}", operand.vreg().vreg(), fact)?; - } - } - } - } if let Some(user_stack_map) = self.get_user_stack_map(InsnIndex::new(inst)) { writeln!(f, " {user_stack_map:?}")?; } @@ -1751,9 +1692,6 @@ pub struct VRegAllocator { /// lowering rules) or some ABI code. deferred_error: Option, - /// Facts on VRegs, for proof-carrying code. - facts: Vec>, - /// The type of instruction that this allocator makes registers for. _inst: core::marker::PhantomData, } @@ -1768,7 +1706,6 @@ impl VRegAllocator { vreg_types, vreg_aliases: FxHashMap::with_capacity_and_hasher(capacity, Default::default()), deferred_error: None, - facts: Vec::with_capacity(capacity), _inst: core::marker::PhantomData::default(), } } @@ -1808,9 +1745,6 @@ impl VRegAllocator { self.vreg_types.push(reg_ty); } - // Create empty facts for each allocated vreg. - self.facts.resize(self.vreg_types.len(), None); - Ok(regs) } @@ -1853,13 +1787,6 @@ impl VRegAllocator { // Disallow cycles (see below). assert_ne!(resolved_to, from); - // Maintain the invariant that PCC facts only exist on vregs - // which aren't aliases. We want to preserve whatever was - // stated about the vreg before its producer was lowered. - if let Some(fact) = self.facts[from.vreg()].take() { - self.set_fact(resolved_to, fact); - } - let old_alias = self.vreg_aliases.insert(from, resolved_to); debug_assert_eq!(old_alias, None); } @@ -1884,42 +1811,6 @@ impl VRegAllocator { fn debug_assert_no_vreg_aliases(&self, mut list: impl Iterator) { debug_assert!(list.all(|vreg| !self.vreg_aliases.contains_key(&vreg))); } - - /// Set the proof-carrying code fact on a given virtual register. - /// - /// Returns the old fact, if any (only one fact can be stored). - fn set_fact(&mut self, vreg: regalloc2::VReg, fact: Fact) -> Option { - trace!("vreg {:?} has fact: {:?}", vreg, fact); - debug_assert!(!self.vreg_aliases.contains_key(&vreg)); - self.facts[vreg.vreg()].replace(fact) - } - - /// Set a fact only if one doesn't already exist. - pub fn set_fact_if_missing(&mut self, vreg: VirtualReg, fact: Fact) { - let vreg = self.resolve_vreg_alias(vreg.into()); - if self.facts[vreg.vreg()].is_none() { - self.set_fact(vreg, fact); - } - } - - /// Allocate a fresh ValueRegs, with a given fact to apply if - /// the value fits in one VReg. - pub fn alloc_with_maybe_fact( - &mut self, - ty: Type, - fact: Option, - ) -> CodegenResult> { - let result = self.alloc(ty)?; - - // Ensure that we don't lose a fact on a value that splits - // into multiple VRegs. - assert!(result.len() == 1 || fact.is_none()); - if let Some(fact) = fact { - self.set_fact(result.regs()[0].into(), fact); - } - - Ok(result) - } } /// This structure tracks the large constants used in VCode that will be emitted separately by the diff --git a/cranelift/codegen/src/prelude_lower.isle b/cranelift/codegen/src/prelude_lower.isle index deb916f13e2a..8200c814c9ad 100644 --- a/cranelift/codegen/src/prelude_lower.isle +++ b/cranelift/codegen/src/prelude_lower.isle @@ -136,11 +136,6 @@ (decl put_in_regs_vec (ValueSlice) ValueRegsVec) (extern constructor put_in_regs_vec put_in_regs_vec) -;; If the given reg is a real register, cause the value in reg to be in a virtual -;; reg, by copying it into a new virtual reg. -(decl ensure_in_vreg (Reg Type) Reg) -(extern constructor ensure_in_vreg ensure_in_vreg) - ;; Get the `n`th register inside a `ValueRegs`. (spec (value_regs_get arg i) (provide (= arg result) (= (widthof i) 1))) @@ -184,11 +179,6 @@ (rule (multi_reg_to_single (MultiReg.One a)) (value_reg a)) -;; Add a range fact to a register, when compiling with -;; proof-carrying-code enabled. -(decl add_range_fact (Reg u16 u64 u64) Reg) -(extern constructor add_range_fact add_range_fact) - ;;;; Common Mach Types ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (type MachLabel (primitive MachLabel)) diff --git a/cranelift/codegen/src/print_errors.rs b/cranelift/codegen/src/print_errors.rs index 21a2767267e8..ee9bc788385e 100644 --- a/cranelift/codegen/src/print_errors.rs +++ b/cranelift/codegen/src/print_errors.rs @@ -4,7 +4,6 @@ use crate::entity::SecondaryMap; use crate::ir; use crate::ir::entities::{AnyEntity, Block, Inst, Value}; use crate::ir::function::Function; -use crate::ir::pcc::Fact; use crate::result::CodegenError; use crate::verifier::{VerifierError, VerifierErrors}; use crate::write::{FuncWriter, PlainWriter, decorate_function}; @@ -72,9 +71,8 @@ impl<'a> FuncWriter for PrettyVerifierError<'a> { func: &Function, entity: AnyEntity, value: &dyn fmt::Display, - maybe_fact: Option<&Fact>, ) -> fmt::Result { - pretty_preamble_error(w, func, entity, value, maybe_fact, &mut *self.0, self.1) + pretty_preamble_error(w, func, entity, value, &mut *self.0, self.1) } } @@ -158,12 +156,11 @@ fn pretty_preamble_error( func: &Function, entity: AnyEntity, value: &dyn fmt::Display, - maybe_fact: Option<&Fact>, func_w: &mut dyn FuncWriter, errors: &mut Vec, ) -> fmt::Result { let mut s = String::new(); - func_w.write_entity_definition(&mut s, func, entity, value, maybe_fact)?; + func_w.write_entity_definition(&mut s, func, entity, value)?; write!(w, "{s}")?; // TODO: Use drain_filter here when it gets stabilized diff --git a/cranelift/codegen/src/result.rs b/cranelift/codegen/src/result.rs index c62572cd9958..da16cb6d3d05 100644 --- a/cranelift/codegen/src/result.rs +++ b/cranelift/codegen/src/result.rs @@ -1,10 +1,8 @@ //! Result and error types representing the outcome of compiling a function. -use regalloc2::checker::CheckerErrors; - -use crate::ir::pcc::PccError; use crate::{ir::Function, verifier::VerifierErrors}; use alloc::string::String; +use regalloc2::checker::CheckerErrors; /// A compilation error. /// @@ -42,9 +40,6 @@ pub enum CodegenError { /// Register allocator internal error discovered by the symbolic checker. Regalloc(CheckerErrors), - - /// Proof-carrying-code validation error. - Pcc(PccError), } /// A convenient alias for a `Result` that uses `CodegenError` as the error type. @@ -62,7 +57,6 @@ impl core::error::Error for CodegenError { #[cfg(feature = "unwind")] CodegenError::RegisterMappingError { .. } => None, CodegenError::Regalloc(..) => None, - CodegenError::Pcc(..) => None, } } } @@ -77,10 +71,6 @@ impl core::fmt::Display for CodegenError { #[cfg(feature = "unwind")] CodegenError::RegisterMappingError(_0) => write!(f, "Register mapping error"), CodegenError::Regalloc(errors) => write!(f, "Regalloc validation errors: {errors:?}"), - - // NOTE: if this is changed, please update the `is_pcc_error` function defined in - // `wasmtime/crates/fuzzing/src/oracles.rs` - CodegenError::Pcc(e) => write!(f, "Proof-carrying-code validation error: {e:?}"), } } } diff --git a/cranelift/codegen/src/settings.rs b/cranelift/codegen/src/settings.rs index 158ba139bd42..2c74fa9c994d 100644 --- a/cranelift/codegen/src/settings.rs +++ b/cranelift/codegen/src/settings.rs @@ -500,7 +500,6 @@ regalloc_checker = false regalloc_verbose_logs = false enable_alias_analysis = true enable_verifier = true -enable_pcc = false is_pic = false use_colocated_libcalls = false enable_nan_canonicalization = false diff --git a/cranelift/codegen/src/verifier/mod.rs b/cranelift/codegen/src/verifier/mod.rs index 71dc457d8b85..5fca9a68d94d 100644 --- a/cranelift/codegen/src/verifier/mod.rs +++ b/cranelift/codegen/src/verifier/mod.rs @@ -72,8 +72,7 @@ use crate::ir::instructions::{CallInfo, InstructionFormat, ResolvedConstraint}; use crate::ir::{self, ArgumentExtension, BlockArg, ExceptionTable}; use crate::ir::{ ArgumentPurpose, Block, Constant, DynamicStackSlot, FuncRef, Function, GlobalValue, Inst, - JumpTable, MemFlags, MemoryTypeData, Opcode, SigRef, StackSlot, Type, Value, ValueDef, - ValueList, types, + JumpTable, MemFlags, Opcode, SigRef, StackSlot, Type, Value, ValueDef, ValueList, types, }; use crate::ir::{ExceptionTableItem, Signature}; use crate::isa::{CallConv, TargetIsa}; @@ -411,53 +410,6 @@ impl<'a> Verifier<'a> { Ok(()) } - fn verify_memory_types(&self, errors: &mut VerifierErrors) -> VerifierStepResult { - // Verify that all fields are statically-sized and lie within - // the struct, do not overlap, and are in offset order - for (mt, mt_data) in &self.func.memory_types { - match mt_data { - MemoryTypeData::Struct { size, fields } => { - let mut last_offset = 0; - for field in fields { - if field.offset < last_offset { - errors.report(( - mt, - format!( - "memory type {} has a field at offset {}, which is out-of-order", - mt, field.offset - ), - )); - } - last_offset = match field.offset.checked_add(u64::from(field.ty.bytes())) { - Some(o) => o, - None => { - errors.report(( - mt, - format!( - "memory type {} has a field at offset {} of size {}; offset plus size overflows a u64", - mt, field.offset, field.ty.bytes()), - )); - break; - } - }; - - if last_offset > *size { - errors.report(( - mt, - format!( - "memory type {} has a field at offset {} of size {} that overflows the struct size {}", - mt, field.offset, field.ty.bytes(), *size), - )); - } - } - } - _ => {} - } - } - - Ok(()) - } - /// Check that the given block can be encoded as a BB, by checking that only /// branching instructions are ending the block. fn encodable_as_bb(&self, block: Block, errors: &mut VerifierErrors) -> VerifierStepResult { @@ -2128,7 +2080,6 @@ impl<'a> Verifier<'a> { pub fn run(&self, errors: &mut VerifierErrors) -> VerifierStepResult { self.verify_global_values(errors)?; - self.verify_memory_types(errors)?; self.typecheck_entry_block_params(errors)?; self.check_entry_not_cold(errors)?; self.typecheck_function_signature(errors)?; diff --git a/cranelift/codegen/src/write.rs b/cranelift/codegen/src/write.rs index c0025aa6fca3..d78074c8fbda 100644 --- a/cranelift/codegen/src/write.rs +++ b/cranelift/codegen/src/write.rs @@ -6,7 +6,6 @@ use crate::entity::SecondaryMap; use crate::ir::entities::AnyEntity; use crate::ir::immediates::Ieee128; -use crate::ir::pcc::Fact; use crate::ir::{Block, DataFlowGraph, Function, Inst, Opcode, SigRef, Type, Value, ValueDef}; use crate::packed_option::ReservedValue; use alloc::string::{String, ToString}; @@ -45,30 +44,24 @@ pub trait FuncWriter { for (ss, slot) in func.dynamic_stack_slots.iter() { any = true; - self.write_entity_definition(w, func, ss.into(), slot, None)?; + self.write_entity_definition(w, func, ss.into(), slot)?; } for (ss, slot) in func.sized_stack_slots.iter() { any = true; - self.write_entity_definition(w, func, ss.into(), slot, None)?; + self.write_entity_definition(w, func, ss.into(), slot)?; } for (gv, gv_data) in &func.global_values { any = true; - let maybe_fact = func.global_value_facts[gv].as_ref(); - self.write_entity_definition(w, func, gv.into(), gv_data, maybe_fact)?; - } - - for (mt, mt_data) in &func.memory_types { - any = true; - self.write_entity_definition(w, func, mt.into(), mt_data, None)?; + self.write_entity_definition(w, func, gv.into(), gv_data)?; } // Write out all signatures before functions since function declarations can refer to // signatures. for (sig, sig_data) in &func.dfg.signatures { any = true; - self.write_entity_definition(w, func, sig.into(), &sig_data, None)?; + self.write_entity_definition(w, func, sig.into(), &sig_data)?; } for (fnref, ext_func) in &func.dfg.ext_funcs { @@ -79,19 +72,18 @@ pub trait FuncWriter { func, fnref.into(), &ext_func.display(Some(&func.params)), - None, )?; } } for (&cref, cval) in func.dfg.constants.iter() { any = true; - self.write_entity_definition(w, func, cref.into(), cval, None)?; + self.write_entity_definition(w, func, cref.into(), cval)?; } if let Some(limit) = func.stack_limit { any = true; - self.write_entity_definition(w, func, AnyEntity::StackLimit, &limit, None)?; + self.write_entity_definition(w, func, AnyEntity::StackLimit, &limit)?; } Ok(any) @@ -104,9 +96,8 @@ pub trait FuncWriter { func: &Function, entity: AnyEntity, value: &dyn fmt::Display, - maybe_fact: Option<&Fact>, ) -> fmt::Result { - self.super_entity_definition(w, func, entity, value, maybe_fact) + self.super_entity_definition(w, func, entity, value) } /// Default impl of `write_entity_definition` @@ -116,13 +107,8 @@ pub trait FuncWriter { _func: &Function, entity: AnyEntity, value: &dyn fmt::Display, - maybe_fact: Option<&Fact>, ) -> fmt::Result { - if let Some(fact) = maybe_fact { - writeln!(w, " {entity} ! {fact} = {value}") - } else { - writeln!(w, " {entity} = {value}") - } + writeln!(w, " {entity} = {value}") } } @@ -208,11 +194,7 @@ pub fn write_function_spec(w: &mut dyn Write, func: &Function) -> fmt::Result { fn write_arg(w: &mut dyn Write, func: &Function, arg: Value) -> fmt::Result { let ty = func.dfg.value_type(arg); - if let Some(f) = &func.dfg.facts[arg] { - write!(w, "{arg} ! {f}: {ty}") - } else { - write!(w, "{arg}: {ty}") - } + write!(w, "{arg}: {ty}") } /// Write out the basic block header, outdented: @@ -366,9 +348,6 @@ fn write_instruction( } else { write!(w, ", {r}")?; } - if let Some(f) = &func.dfg.facts[*r] { - write!(w, " ! {f}")?; - } } if has_results { write!(w, " = ")?; diff --git a/cranelift/filetests/filetests/pcc/fail/add.clif b/cranelift/filetests/filetests/pcc/fail/add.clif deleted file mode 100644 index 3e5e9313fe7d..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/add.clif +++ /dev/null @@ -1,51 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -function %f0(i32, i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(32, 0, 0x80): i32): - v2 ! range(32, 0, 0x17f) = iadd.i32 v0, v1 - return v2 -} - -function %f1(i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0x100) = iadd.i32 v0, v1 - return v2 -} - -function %f3(i32) -> i64 { -block0(v0: i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0xffff_fffe) = iadd.i32 v0, v1 - v3 ! range(64, 0, 0xffff_fffe) = uextend.i64 v2 - return v3 -} - -function %f3(i32) -> i64 { -block0(v0: i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0xffff_ffff) = iadd.i32 v0, v1 - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v2 - v4 ! range(64, 0, 0x1) = iconst.i64 1 - v5 ! range(64, 0, 0xffff_ffff) = iadd.i64 v3, v4 - return v5 -} - -;; check merged ops: -function %f4(i32, i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(32, 0, 0x200): i32): - v2 = iconst.i32 2 - v3 ! range(32, 0, 0x400) = ishl.i32 v0, v2 - v4 ! range(32, 0, 0x5ff) = iadd.i32 v1, v3 - return v4 -} - -function %f5(i32, i64) -> i64 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(64, 0, 0x200): i64): - v2 ! range(64, 0, 0x100) = uextend.i64 v0 - v3 ! range(64, 0, 0x2ff) = iadd.i64 v1, v2 - return v3 -} diff --git a/cranelift/filetests/filetests/pcc/fail/blockparams.clif b/cranelift/filetests/filetests/pcc/fail/blockparams.clif deleted file mode 100644 index 3840f9932322..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/blockparams.clif +++ /dev/null @@ -1,20 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64, i32) -> i64 { -block0(v0 ! range(64, 0, 0x100): i64, v1: i32): - v2 ! range(64, 0, 0x100) = iconst.i64 0x100 - v3 ! range(64, 0, 0x200) = iadd v0, v2 - brif v1, block1(v0), block2(v3) - -block1(v4 ! range(64, 0, 0xff): i64): ;; shrink the range -- should be caught - jump block3(v4) - -block2(v5 ! range(64, 0, 0x1ff): i64): - jump block3(v5) - -block3(v6 ! range(64, 0, 1): i64): - return v6 -} diff --git a/cranelift/filetests/filetests/pcc/fail/extend.clif b/cranelift/filetests/filetests/pcc/fail/extend.clif deleted file mode 100644 index 5503aa23e48d..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/extend.clif +++ /dev/null @@ -1,10 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -function %f0(i32) -> i64 { -block0(v0 ! range(32, 0, 0xffff_ffff): i32): - v1 ! range(64, 0, 0xffff_0000) = uextend.i64 v0 - return v1 -} diff --git a/cranelift/filetests/filetests/pcc/fail/load.clif b/cranelift/filetests/filetests/pcc/fail/load.clif deleted file mode 100644 index 24d4467cd37c..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/load.clif +++ /dev/null @@ -1,65 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -function %f0(i64, i32) -> i64 { - mt0 = memory 0x1000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0x1000): i32): - v2 ! range(64, 0, 0x100) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0x100) = iadd.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} - -;; Insufficient guard region: the 8-byte load could go off the end. -function %f1(i64, i32) -> i64 { - mt0 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xffff_ffff): i32): - v2 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0xffff_ffff) = iadd.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} - -;; RegRegExtend mode on aarch64. -function %f2(i64, i32) -> i8 { - mt0 = memory 0x1000 -block0(v0 ! mem(mt0, 0, 0x1000): i64, v1 ! range(32, 0, 0x1000): i32): - v2 ! range(64, 0, 0x100) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0x100) = iadd.i64 v0, v2 - v4 = load.i8 checked v3 - return v4 -} - -;; RegReg mode on aarch64. -function %f3(i64, i64) -> i8 { - mt0 = memory 0x100 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(64, 0, 0xfff): i64): - v2 ! mem(mt0, 0, 0xfff) = iadd.i64 v0, v1 - v3 = load.i8 checked v2 - return v3 -} - -;; RegScaledExtended mode on aarch64. -function %f4(i64, i32) -> i64 { - mt0 = memory 0x7000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xfff): i32): - v2 ! range(64, 0, 0xfff) = uextend.i64 v1 - v3 = iconst.i32 3 - v4 ! range(64, 0, 0x7ff8) = ishl.i64 v2, v3 - v5 ! mem(mt0, 0, 0x7ff8) = iadd.i64 v0, v4 - v6 = load.i64 checked v5 - return v6 -} - -;; RegScaled mode on aarch64. -function %f5(i64, i64) -> i64 { - mt0 = memory 0x7000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(64, 0, 0xfff): i64): - v2 = iconst.i32 3 - v3 ! range(64, 0, 0x7ff8) = ishl.i64 v1, v2 - v4 ! mem(mt0, 0, 0x7ff8) = iadd.i64 v0, v3 - v5 = load.i64 checked v4 - return v5 -} diff --git a/cranelift/filetests/filetests/pcc/fail/memtypes.clif b/cranelift/filetests/filetests/pcc/fail/memtypes.clif deleted file mode 100644 index 6f5b12a38307..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/memtypes.clif +++ /dev/null @@ -1,30 +0,0 @@ -test verifier -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64) -> i32 { - mt0 = struct 8 { 4: i32, 0: i32 } ; error: out-of-order - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 = load.i32 v0+0 - return v1 -} - -function %f1(i64) -> i32 { - ;; out-of-bounds field: - mt0 = struct 8 { 0: i32, 6: i32 } ; error: field at offset 6 of size 4 that overflows - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 = load.i32 v0+0 - return v1 -} - -function %f2(i64) -> i32 { - ;; overflowing offset + field size: - mt0 = struct 8 { 0: i32, 0xffff_ffff_ffff_ffff: i32 } ; error: field at offset 18446744073709551615 of size 4; offset plus size overflows a u64 - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 = load.i32 v0+0 - return v1 -} diff --git a/cranelift/filetests/filetests/pcc/fail/shift.clif b/cranelift/filetests/filetests/pcc/fail/shift.clif deleted file mode 100644 index ab56de3447c3..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/shift.clif +++ /dev/null @@ -1,12 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; FIXME: should get pcc working again on x64 -; target x86_64 - -function %f0(i32) -> i32 { -block0(v0 ! range(32, 1, 0x100): i32): - v1 = iconst.i32 2 - v2 ! range(32, 4, 0x3ff) = ishl.i32 v0, v1 - return v2 -} diff --git a/cranelift/filetests/filetests/pcc/fail/simple.clif b/cranelift/filetests/filetests/pcc/fail/simple.clif deleted file mode 100644 index 2db3cae696a5..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/simple.clif +++ /dev/null @@ -1,27 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -;; The `memory` memtype is not large enough here -- the 4GiB-range -;; 32-bit offset could go out of range. PCC should catch this. - -function %simple1(i64 vmctx, i32) -> i8 { - mt0 = memory 0x8000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xffff_ffff): i32): - v2 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0xffff_ffff) = iadd.i64 v0, v2 - v4 = load.i8 checked v3 - return v4 -} - -;; Check that the offset in the `mem` is validated too. - -function %simple2(i64 vmctx, i32) -> i8 { - mt0 = memory 0x8000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xffff_ffff): i32): - v2 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0) = iadd.i64 v0, v2 - v4 = load.i8 checked v3 - return v4 -} diff --git a/cranelift/filetests/filetests/pcc/fail/struct.clif b/cranelift/filetests/filetests/pcc/fail/struct.clif deleted file mode 100644 index 09c5f16347e5..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/struct.clif +++ /dev/null @@ -1,29 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -function %f0(i64) -> i64 { - mt0 = struct 8 { 0: i64 ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt1, 8, 8) = load.i64 checked v0 - return v1 -} - -function %f1(i64, i64) { - mt0 = struct 8 { 0: i64 ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! mem(mt1, 8, 8): i64): - store.i64 checked v1, v0 - return -} - -function %f2(i64) -> i32 { - mt0 = struct 8 { 0: i32 ! range(32, 0, 1), 4: i32 } - - ;; insufficiently-constrained range: -block0(v0 ! mem(mt0, 0, 8): i64): - v1 ! range(32, 0, 1) = load.i32 checked v0+0 - return v1 -} diff --git a/cranelift/filetests/filetests/pcc/fail/vmctx.clif b/cranelift/filetests/filetests/pcc/fail/vmctx.clif deleted file mode 100644 index fd2cae69ff95..000000000000 --- a/cranelift/filetests/filetests/pcc/fail/vmctx.clif +++ /dev/null @@ -1,38 +0,0 @@ -test compile expect-fail -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -;; Equivalent to a Wasm `i64.load` from a static memory. -function %f0(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - ;; mock static memory: 4GiB range, *but insufficient guard* - mt1 = memory 0x1_0000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - ;; Compute the address: base + offset. Guard region (2GiB) is - ;; sufficient for an 8-byte I64 load. - v2 ! mem(mt1, 0, 0) = load.i64 checked v0+0 ;; base pointer - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 ;; offset - v4 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v2, v3 - v5 = load.i64 checked v4 - return v5 -} - -;; Equivalent to a Wasm `i64.load` from a static memory. -function %f1(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 16 { 0: i64 readonly ! mem(mt1, 0, 0), 8: i64 readonly } - ;; mock static memory: 4GiB range, *but insufficient guard* - mt1 = memory 0x1_8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - ;; Compute the address: base + offset. Guard region (2GiB) is - ;; sufficient for an 8-byte I64 load. - v2 ! mem(mt1, 0, 0) = load.i64 checked v0+8 ;; base pointer, but the wrong one - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 ;; offset - v4 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v2, v3 - v5 = load.i64 checked v4 - return v5 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/add.clif b/cranelift/filetests/filetests/pcc/succeed/add.clif deleted file mode 100644 index 2e2416ce642d..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/add.clif +++ /dev/null @@ -1,61 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i32, i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(32, 0, 0x80): i32): - v2 ! range(32, 0, 0x180) = iadd.i32 v0, v1 - return v2 -} - -function %f1(i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0x101) = iadd.i32 v0, v1 - return v2 -} - -;; a looser but still accurate bound should check too: -function %f2(i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0x102) = iadd.i32 v0, v1 - return v2 -} - -;; we should be able to verify a range based on the type alone: -function %f3(i32) -> i64 { -block0(v0: i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0xffff_ffff) = iadd.i32 v0, v1 - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v2 - return v3 -} - -;; we should be able to verify a range based on the type alone: -function %f3(i32) -> i64 { -block0(v0: i32): - v1 ! range(32, 0, 1) = iconst.i32 1 - v2 ! range(32, 0, 0xffff_ffff) = iadd.i32 v0, v1 - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v2 - v4 ! range(64, 0, 0x1) = iconst.i64 1 - v5 ! range(64, 0, 0x1_0000_0000) = iadd.i64 v3, v4 - return v5 -} - -;; check merged ops: -function %f4(i32, i32) -> i32 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(32, 0, 0x200): i32): - v2 = iconst.i32 2 - v3 ! range(32, 0, 0x400) = ishl.i32 v0, v2 - v4 ! range(32, 0, 0x600) = iadd.i32 v1, v3 - return v4 -} - -function %f5(i32, i64) -> i64 { -block0(v0 ! range(32, 0, 0x100): i32, v1 ! range(64, 0, 0x200): i64): - v2 ! range(64, 0, 0x100) = uextend.i64 v0 - v3 ! range(64, 0, 0x300) = iadd.i64 v1, v2 - return v3 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/blockparams.clif b/cranelift/filetests/filetests/pcc/succeed/blockparams.clif deleted file mode 100644 index 7a823e1bf27d..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/blockparams.clif +++ /dev/null @@ -1,20 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64, i32) -> i64 { -block0(v0 ! range(64, 0, 0x100): i64, v1: i32): - v2 ! range(64, 0, 0x100) = iconst.i64 0x100 - v3 ! range(64, 0, 0x200) = iadd v0, v2 - brif v1, block1(v0), block2(v3) - -block1(v4 ! range(64, 0, 0x1000): i64): ;; broaden the range -- always allowed - jump block3(v4) - -block2(v5 ! range(64, 0, 0x2000): i64): - jump block3(v5) - -block3(v6 ! range(64, 0, 0x2001): i64): - return v6 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/const.clif b/cranelift/filetests/filetests/pcc/succeed/const.clif deleted file mode 100644 index dd1e258d4e1c..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/const.clif +++ /dev/null @@ -1,42 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0() { -block0: - v0 ! range(64, 0, 0) = iconst.i64 0 - v1 ! range(64, 1, 1) = iconst.i64 1 - v2 ! range(64, 0xfff, 0xfff) = iconst.i64 0xfff - v3 ! range(64, 0x10000, 0x10000) = iconst.i64 0x10000 - v4 ! range(64, 0xffffc, 0xffffc) = iconst.i64 0xffffc - v5 ! range(64, 0x1_0000_0000, 0x1_0000_0000) = iconst.i64 0x1_0000_0000 - v6 ! range(64, 0x1_0000_0000_0000, 0x1_0000_0000_0000) = iconst.i64 0x1_0000_0000_0000 - v7 ! range(64, 0xffff_0000_0000_0000, 0xffff_0000_0000_0000) = iconst.i64 0xffff_0000_0000_0000 - v8 ! range(64, 0xffff_0000_0000_ffff, 0xffff_0000_0000_ffff) = iconst.i64 0xffff_0000_0000_ffff - return -} - -function %f1() -> i32 { -block0: - v0 = iconst.i32 0x10_0010 - return v0 -} - -function %f2() -> i64 { -block0: - v0 = iconst.i64 0x9_ffff_ffff - return v0 -} - -function %f3() -> i64 { -block0: - v0 = iconst.i64 0xffff_fff7 - return v0 -} - -function %f4() -> i64 { -block0: - v0 ! range(64, 0x1_0001_ffff_ffff, 0x1_0001_ffff_ffff) = iconst.i64 0x1_0001_ffff_ffff - return v0 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/dynamic.clif b/cranelift/filetests/filetests/pcc/succeed/dynamic.clif deleted file mode 100644 index d05f08c76caf..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/dynamic.clif +++ /dev/null @@ -1,42 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -;; Equivalent to a Wasm `i64.load` from a dynamic memory. -function %f0(i64 vmctx, i32) -> i64 { - gv0 = vmctx - gv1 = load.i64 notrap aligned checked gv0+0 ;; base - gv2 = load.i64 notrap aligned checked gv0+8 ;; size - - ;; mock vmctx struct: - mt0 = struct 16 { - 0: i64 readonly ! dynamic_mem(mt1, 0, 0), - 8: i64 readonly ! dynamic_range(64, gv2, gv2), - } - ;; mock dynamic memory: dynamic range, plus 2GiB guard - mt1 = dynamic_memory gv2 + 0x8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! dynamic_range(32, v1, v1): i32): - v2 ! dynamic_range(64, v1, v1) = uextend.i64 v1 ;; extended Wasm offset - v3 ! dynamic_mem(mt1, 0, 0) = global_value.i64 gv1 ;; base - v4 ! dynamic_range(64, gv2, gv2) = global_value.i64 gv2 ;; size - v5 ! compare(uge, v1, gv2) = icmp.i64 uge v2, v4 ;; bounds-check compare of extended Wasm offset to size - v6 ! dynamic_mem(mt1, v1, v1) = iadd.i64 v3, v2 ;; compute access address: memory base plus extended Wasm offset - v7 ! dynamic_mem(mt1, 0, 0, nullable) = iconst.i64 0 ;; null pointer for speculative path - v8 ! dynamic_mem(mt1, 0, gv2-1, nullable) = select_spectre_guard v5, v7, v6 ;; if OOB, pick null, otherwise the real address - v9 = load.i64 checked v8 - return v9 -} - -;; select sees: -;; v5 ! compare(uge, v1, gv2) -;; v6 ! dynamic_mem(mt1, v1, v1) -;; v7 ! dynamic_mem(mt0, 0, 0, nullable) -;; -;; preprocess: -;; v6' (assuming compare is false) = dynamic_mem(mt1, 0, gv2-1) -;; v7' (assuming compare is true) = dynamic_mem(mt1, 0, 0, nullable) -;; -;; take the union of range and nullability: -;; dynamic_mem(mt1, 0, gv2-1, nullable) diff --git a/cranelift/filetests/filetests/pcc/succeed/extend.clif b/cranelift/filetests/filetests/pcc/succeed/extend.clif deleted file mode 100644 index 2926aa65bd7d..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/extend.clif +++ /dev/null @@ -1,17 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i32) -> i64 { -block0(v0 ! range(32, 42, 0xffff_fffe): i32): - ;; we're allowed to broaden the range on either end: - v1 ! range(64, 1, 0xffff_ffff) = uextend.i64 v0 - return v1 -} - -function %f1(i32) -> i64 { -block0(v0 ! range(16, 0, 0xffff): i32): - v1 ! range(64, 0, 0xffff_ffff) = uextend.i64 v0 - return v1 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/fuzz-float-loads.clif b/cranelift/filetests/filetests/pcc/succeed/fuzz-float-loads.clif deleted file mode 100644 index 1edaa92b0c43..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/fuzz-float-loads.clif +++ /dev/null @@ -1,86 +0,0 @@ -test compile -set enable_pcc=true -set opt_level=speed -target aarch64 -;; disabled until PCC is migrated to new assembler: target x86_64 - -function u0:0(i64 vmctx, i64) fast { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0+8 - gv2 = load.i64 notrap aligned gv1 - gv3 ! mem(mt0, 0x0, 0x0) = vmctx - gv4 ! mem(mt1, 0x0, 0x0) = load.i64 notrap aligned readonly checked gv3+80 - mt0 = struct 88 { 80: i64 readonly ! mem(mt1, 0x0, 0x0) } - mt1 = memory 0x180000000 - sig0 = (i64 vmctx) system_v - sig1 = (i64 vmctx, i32 uext) system_v - sig2 = (i64 vmctx, i32 uext, i32 uext, i32 uext) -> i32 uext system_v - const0 = 0x02030077ff00ff04030077ff6cff5503 - stack_limit = gv2 - -block0(v0: i64, v1: i64): - v2 = iconst.i32 0 - v25 -> v2 - v45 -> v2 - v24 -> v25 - v3 = iconst.i64 0 - v4 = global_value.i64 gv3 - v5 = load.i64 notrap aligned v4+8 - v17 -> v5 - v44 -> v5 - v42 -> v17 - v6 = load.i64 notrap aligned v5+8 - v7 = iadd_imm v6, 1 - v8 = iconst.i64 0 - v9 = icmp sge v7, v8 ; v8 = 0 - brif v9, block2, block3(v7) - -block2: - store.i64 notrap aligned v7, v5+8 - v10 = global_value.i64 gv3 - v11 = load.i64 notrap aligned readonly v10+56 - v12 = load.i64 notrap aligned readonly v11+120 - call_indirect sig0, v12(v10) - v13 = load.i64 notrap aligned v5+8 - jump block3(v13) - -block3(v43: i64): - v15 -> v43 - jump block4 - -block4: - v14 = iconst.i64 0 - v16 = icmp.i64 sge v15, v14 ; v14 = 0 - brif v16, block6, block7(v15) - -block6: - store.i64 notrap aligned v15, v17+8 - v18 = global_value.i64 gv3 - v19 = load.i64 notrap aligned readonly v18+56 - v20 = load.i64 notrap aligned readonly v19+120 - call_indirect sig0, v20(v18) - v21 = load.i64 notrap aligned v17+8 - jump block7(v21) - -block7(v40: i64): - v22 = vconst.i8x16 const0 - v23 = uwiden_high v22 ; v22 = const0 - v26 = bitcast.i8x16 little v23 - v27 = sshr v26, v25 ; v25 = 0 - v28 = bitcast.i64x2 little v27 - v29 = extractlane v28, 1 - v30 = iconst.i32 1 - v31 = global_value.i64 gv3 - v32 = load.i64 notrap aligned readonly v31+56 - v33 = load.i64 notrap aligned readonly v32+24 - call_indirect sig1, v33(v31, v30) ; v30 = 1 - v34 = ireduce.i32 v29 - v35 ! range(64, 0x0, 0xffffffff) = uextend.i64 v34 - v36 ! mem(mt1, 0x0, 0x0) = global_value.i64 gv4 - v37 ! mem(mt1, 0x0, 0xffffffff) = iadd v36, v35 - v38 = load.f64 little checked heap v37 - v39 = f64const 0x0.0000000005b28p-1022 - v41 = iadd_imm v40, 9 - store notrap aligned v41, v17+8 - trap user1 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/gv_fact.clif b/cranelift/filetests/filetests/pcc/succeed/gv_fact.clif deleted file mode 100644 index 329b8d444edc..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/gv_fact.clif +++ /dev/null @@ -1,58 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64 vmctx) -> i64 { - mt0 = struct 16 { 8: i64 ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 - gv0 ! mem(mt0, 0, 0) = vmctx - gv1 ! mem(mt1, 0, 0) = load.i64 notrap aligned checked gv0+8 - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt1, 0, 0) = global_value.i64 gv1 - return v1 -} - -function %f1(i64 vmctx) -> i64 { - mt0 = struct 16 { 8: i64 ! mem(mt1, 0, 0) } - mt1 = struct 8 { 0: i64 ! mem(mt2, 0, 0) } - mt2 = memory 0x1_0000_0000 - gv0 ! mem(mt0, 0, 0) = vmctx - gv1 ! mem(mt1, 0, 0) = load.i64 notrap aligned checked gv0+8 - gv2 ! mem(mt2, 0, 0) = load.i64 notrap aligned checked gv1+0 - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt2, 0, 0) = global_value.i64 gv2 - return v1 -} - -function %f2(i64 vmctx) -> i64 { - mt0 = struct 16 { 8: i64 ! mem(mt1, 0, 0) } - mt1 = struct 8 { 0: i64 ! mem(mt2, 0, 0) } - mt2 = memory 0x1_0000_0000 - gv0 ! mem(mt0, 0, 0) = vmctx - gv1 ! mem(mt1, 0, 0) = load.i64 notrap aligned checked gv0+8 - gv2 ! mem(mt2, 0, 0) = load.i64 notrap aligned checked gv1+0 - gv3 ! mem(mt2, 8, 8) = iadd_imm.i64 gv2, 8 - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt2, 8, 8) = global_value.i64 gv3 - return v1 -} - -function %f3(i64 vmctx) -> i64 { - mt0 = struct 16 { 8: i64 ! mem(mt1, 0, 0) } - mt1 = struct 8 { 0: i64 ! mem(mt2, 0, 0) } - mt2 = memory 0x1_0000_0000 - gv0 ! mem(mt0, 0, 0) = vmctx - gv1 ! mem(mt1, 0, 0) = load.i64 notrap aligned checked gv0+8 - gv2 ! mem(mt2, 0, 0) = load.i64 notrap aligned checked gv1+0 - gv3 ! mem(mt2, 8, 8) = iadd_imm.i64 gv2, 8 - - ;; like the above, but with no fact provided on `v0`; it should - ;; get copied from the GV. -block0(v0: i64): - v1 ! mem(mt2, 8, 8) = global_value.i64 gv3 - return v1 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/imul-fuzzbug.clif b/cranelift/filetests/filetests/pcc/succeed/imul-fuzzbug.clif deleted file mode 100644 index 7bc77f03ce15..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/imul-fuzzbug.clif +++ /dev/null @@ -1,282 +0,0 @@ -test compile -set enable_pcc=true -set opt_level=speed -target x86_64 - -function u0:3(i64 vmctx, i64) fast { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0+8 - gv2 = load.i64 notrap aligned gv1 - gv3 ! mem(mt0, 0x0, 0x0) = vmctx - mt0 = struct 0 { } - sig0 = (i64 vmctx, i32 uext) system_v - sig1 = (i64 vmctx, i32 uext, i32 uext) -> i32 uext system_v - sig2 = (i64 vmctx, i32 uext) -> i32 uext system_v - stack_limit = gv2 - -block0(v0 ! mem(mt0, 0x0, 0x0): i64, v1: i64): - v13 -> v0 - v17 -> v0 - v21 -> v0 - v22 -> v0 - v43 -> v0 - v51 -> v0 - v155 -> v0 - v160 -> v0 - v163 -> v0 - v164 -> v0 - v167 -> v0 - v168 -> v0 - v171 -> v0 - v173 -> v0 - v176 -> v0 - v177 -> v0 - v180 -> v0 - v182 -> v0 - v185 -> v0 - v2 = f64const 0.0 - v3 = iconst.i64 0 - v4 = iconst.i64 0 - v5 = iconst.i64 0 - v6 = iconst.i64 0 - v7 = iconst.i64 0 - v8 = iconst.i64 0 - v9 = iconst.i64 0 - v10 = iconst.i64 0 - v11 = iconst.i64 0 - v12 = iconst.i64 0 - v14 = load.i32 notrap aligned table v13+192 - v186 = iconst.i32 0 - v15 = icmp eq v14, v186 ; v186 = 0 - v16 = uextend.i32 v15 - brif v16, block2, block3 - -block2: - trap user1 - -block3: - v18 = load.i32 notrap aligned table v17+192 - v19 = iconst.i32 1 - v20 = isub v18, v19 ; v19 = 1 - store notrap aligned table v20, v21+192 - v23 = load.i32 notrap aligned table v22+128 - v24 = f64const -0x1.3090455030609p194 - v25 = fneg v24 ; v24 = -0x1.3090455030609p194 - v26 = fneg v25 - v27 = fneg v26 - v28 = fneg v27 - v29 = fneg v28 - v30 = fneg v29 - v31 = fneg v30 - v32 = fneg v31 - v33 = fneg v32 - v34 = fneg v33 - v35 = fneg v34 - v36 = fneg v35 - v37 = floor v36 - v38 = f64const +NaN - v39 = fcmp eq v37, v37 - v40 = uextend.i32 v39 - v41 = select v40, v37, v38 ; v38 = +NaN - v42 = iconst.i32 0x1309_0455 - v44 = load.i32 notrap aligned table v43+128 - v45 = rotl v42, v44 ; v42 = 0x1309_0455 - v46 = fcvt_from_sint.f32 v45 - v47 = iconst.i64 0x2001_8113_0904_5503 - v48 = iconst.i64 0x2001_8113_0904_5503 - v187 = iconst.i64 0 - v49 = icmp eq v48, v187 ; v48 = 0x2001_8113_0904_5503, v187 = 0 - v50 = uextend.i32 v49 - store notrap aligned table v50, v51+128 - v52 = iconst.i32 0x2001_8113 - v53 = iconst.i32 0x0904_5503 - v54 = rotl v52, v53 ; v52 = 0x2001_8113, v53 = 0x0904_5503 - v55 = fcvt_from_sint.f32 v54 - v56 = iconst.i64 -1 - v70 -> v56 - v71 -> v56 - v57 = iconst.i32 0xffff_ffff - v58 = uextend.i64 v57 ; v57 = 0xffff_ffff - v59 = iconst.i64 1 - v188 = iconst.i64 0 - v60 = icmp eq v58, v188 ; v188 = 0 - v61 = uextend.i32 v60 - v62 = select v61, v59, v58 ; v59 = 1 - v73 -> v62 - v63 = iconst.i64 0x8000_0000_0000_0000 - v64 = icmp ne v56, v63 ; v56 = -1, v63 = 0x8000_0000_0000_0000 - v65 = uextend.i32 v64 - brif v65, block5, block6 - -block6: - v66 = iconst.i64 -1 - v67 = icmp.i64 ne v62, v66 ; v66 = -1 - v68 = uextend.i32 v67 - brif v68, block5, block7 - -block7: - v69 = iconst.i64 1 - jump block4(v69) ; v69 = 1 - -block5: - jump block4(v62) - -block4(v72: i64): - v74 = srem.i64 v56, v72 ; v56 = -1 - v88 -> v74 - v89 -> v74 - v75 = iconst.i32 0xffff_ffff - v76 = uextend.i64 v75 ; v75 = 0xffff_ffff - v77 = iconst.i64 1 - v189 = iconst.i64 0 - v78 = icmp eq v76, v189 ; v189 = 0 - v79 = uextend.i32 v78 - v80 = select v79, v77, v76 ; v77 = 1 - v91 -> v80 - v81 = iconst.i64 0x8000_0000_0000_0000 - v82 = icmp ne v74, v81 ; v81 = 0x8000_0000_0000_0000 - v83 = uextend.i32 v82 - brif v83, block9, block10 - -block10: - v84 = iconst.i64 -1 - v85 = icmp.i64 ne v80, v84 ; v84 = -1 - v86 = uextend.i32 v85 - brif v86, block9, block11 - -block11: - v87 = iconst.i64 1 - jump block8(v87) ; v87 = 1 - -block9: - jump block8(v80) - -block8(v90: i64): - v92 = srem.i64 v74, v90 - v106 -> v92 - v107 -> v92 - v93 = iconst.i32 0xffff_ffff - v94 = uextend.i64 v93 ; v93 = 0xffff_ffff - v95 = iconst.i64 1 - v190 = iconst.i64 0 - v96 = icmp eq v94, v190 ; v190 = 0 - v97 = uextend.i32 v96 - v98 = select v97, v95, v94 ; v95 = 1 - v109 -> v98 - v99 = iconst.i64 0x8000_0000_0000_0000 - v100 = icmp ne v92, v99 ; v99 = 0x8000_0000_0000_0000 - v101 = uextend.i32 v100 - brif v101, block13, block14 - -block14: - v102 = iconst.i64 -1 - v103 = icmp.i64 ne v98, v102 ; v102 = -1 - v104 = uextend.i32 v103 - brif v104, block13, block15 - -block15: - v105 = iconst.i64 1 - jump block12(v105) ; v105 = 1 - -block13: - jump block12(v98) - -block12(v108: i64): - v110 = srem.i64 v92, v108 - v124 -> v110 - v125 -> v110 - v111 = iconst.i32 0xffff_ffff - v112 = uextend.i64 v111 ; v111 = 0xffff_ffff - v113 = iconst.i64 1 - v191 = iconst.i64 0 - v114 = icmp eq v112, v191 ; v191 = 0 - v115 = uextend.i32 v114 - v116 = select v115, v113, v112 ; v113 = 1 - v127 -> v116 - v117 = iconst.i64 0x8000_0000_0000_0000 - v118 = icmp ne v110, v117 ; v117 = 0x8000_0000_0000_0000 - v119 = uextend.i32 v118 - brif v119, block17, block18 - -block18: - v120 = iconst.i64 -1 - v121 = icmp.i64 ne v116, v120 ; v120 = -1 - v122 = uextend.i32 v121 - brif v122, block17, block19 - -block19: - v123 = iconst.i64 1 - jump block16(v123) ; v123 = 1 - -block17: - jump block16(v116) - -block16(v126: i64): - v128 = srem.i64 v110, v126 - v145 -> v128 - v146 -> v128 - v129 = iconst.i32 0x0944_0909 - v130 = popcnt v129 ; v129 = 0x0944_0909 - v131 = iconst.i32 0x3482_3582 - v132 = imul v130, v131 ; v131 = 0x3482_3582 - v133 = uextend.i64 v132 - v134 = iconst.i64 1 - v192 = iconst.i64 0 - v135 = icmp eq v133, v192 ; v192 = 0 - v136 = uextend.i32 v135 - v137 = select v136, v134, v133 ; v134 = 1 - v148 -> v137 - v138 = iconst.i64 0x8000_0000_0000_0000 - v139 = icmp ne v128, v138 ; v138 = 0x8000_0000_0000_0000 - v140 = uextend.i32 v139 - brif v140, block21, block22 - -block22: - v141 = iconst.i64 -1 - v142 = icmp.i64 ne v137, v141 ; v141 = -1 - v143 = uextend.i32 v142 - brif v143, block21, block23 - -block23: - v144 = iconst.i64 1 - jump block20(v144) ; v144 = 1 - -block21: - jump block20(v137) - -block20(v147: i64): - v149 = srem.i64 v128, v147 - v150 = iconst.i32 0xb7b7_746e - v151 = fcvt_from_uint.f32 v150 ; v150 = 0xb7b7_746e - v152 = fcvt_to_sint_sat.i64 v151 - v153 = icmp eq v149, v152 - v154 = uextend.i32 v153 - v156 = load.i32 notrap aligned table v155+128 - v157 = ctz v156 - v158 = f32const 0x1.bc0402p-124 - v159 = bitcast.i32 v158 ; v158 = 0x1.bc0402p-124 - v161 = load.i32 notrap aligned table v160+144 - v162 = bxor v159, v161 - store notrap aligned table v162, v163+144 - v165 = load.i32 notrap aligned table v164+160 - v166 = bxor v157, v165 - store notrap aligned table v166, v167+160 - v169 = load.i32 notrap aligned table v168+160 - v170 = bxor v154, v169 - store notrap aligned table v170, v171+160 - v172 = bitcast.i32 v55 - v174 = load.i32 notrap aligned table v173+144 - v175 = bxor v172, v174 - store notrap aligned table v175, v176+144 - v178 = load.i64 notrap aligned table v177+176 - v179 = bxor.i64 v47, v178 ; v47 = 0x2001_8113_0904_5503 - store notrap aligned table v179, v180+176 - v181 = bitcast.i32 v46 - v183 = load.i32 notrap aligned table v182+144 - v184 = bxor v181, v183 - store notrap aligned table v184, v185+144 - jump block1 - -block1: - return -} diff --git a/cranelift/filetests/filetests/pcc/succeed/load.clif b/cranelift/filetests/filetests/pcc/succeed/load.clif deleted file mode 100644 index 59996ef05fae..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/load.clif +++ /dev/null @@ -1,85 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64, i32) -> i64 { - mt0 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0x100): i32): - v2 ! range(64, 0, 0x100) = uextend.i64 v1 - v3 ! mem(mt0, 0, 8) = iadd.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} - -function %f1(i64, i32) -> i64 { - ;; Note the guard region of 8 bytes -- just enough for the below! - mt0 = memory 0x1_0000_0008 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xffff_ffff): i32): - v2 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0xffff_ffff) = iadd.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} - -;; RegRegExtend mode on aarch64. -function %f2(i64, i32) -> i8 { - mt0 = memory 0x1000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xfff): i32): - v2 ! range(64, 0, 0xfff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0xfff) = iadd.i64 v0, v2 - v4 = load.i8 checked v3 - return v4 -} - -;; RegReg mode on aarch64. -function %f3(i64, i64) -> i8 { - mt0 = memory 0x1000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(64, 0, 0xfff): i64): - v2 ! mem(mt0, 0, 0xfff) = iadd.i64 v0, v1 - v3 = load.i8 checked v2 - return v3 -} - -;; RegScaledExtended mode on aarch64. -function %f4(i64, i32) -> i64 { - mt0 = memory 0x8000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xfff): i32): - v2 ! range(64, 0, 0xfff) = uextend.i64 v1 - v3 = iconst.i32 3 - v4 ! range(64, 0, 0x7ff8) = ishl.i64 v2, v3 - v5 ! mem(mt0, 0, 0x7ff8) = iadd.i64 v0, v4 - v6 = load.i64 checked v5 - return v6 -} - -;; RegScaled mode on aarch64. -function %f5(i64, i64) -> i64 { - mt0 = memory 0x8000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(64, 0, 0xfff): i64): - v2 = iconst.i32 3 - v3 ! range(64, 0, 0x7ff8) = ishl.i64 v1, v2 - v4 ! mem(mt0, 0, 0x7ff8) = iadd.i64 v0, v3 - v5 = load.i64 checked v4 - return v5 -} - -;; UnsignedOffset mode on aarch64. -function %f6(i64) -> i64 { - mt0 = memory 0x8000 -block0(v0 ! mem(mt0, 0, 0): i64): - v2 = iconst.i64 8 - v3 ! mem(mt0, 8, 8) = iadd.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} - -;; Unscaled mode on aarch64. -function %f6(i64) -> i64 { - mt0 = memory 0x8000 -block0(v0 ! mem(mt0, 8, 8): i64): - v2 = iconst.i64 8 - v3 ! mem(mt0, 0, 0) = isub.i64 v0, v2 - v4 = load.i64 checked v3 - return v4 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/memtypes.clif b/cranelift/filetests/filetests/pcc/succeed/memtypes.clif deleted file mode 100644 index dc4805c90cc5..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/memtypes.clif +++ /dev/null @@ -1,24 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64) -> i32 { - mt0 = struct 8 { 0: i32, 4: i32 readonly } - -block0(v0 ! mem(mt0, 0, 0): i64): ;; v0 points to an instance of mt0, at offset 0 - v1 = load.i32 v0+0 - v2 = load.i32 v0+4 - v3 = iadd.i32 v1, v2 - return v3 -} - -function %f1(i64) -> i32 { - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt1, 0, 0) = load.i64 v0 - v2 = load.i32 v1+0x1000 - return v2 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/opt.clif b/cranelift/filetests/filetests/pcc/succeed/opt.clif deleted file mode 100644 index 8fda923223c4..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/opt.clif +++ /dev/null @@ -1,85 +0,0 @@ -test compile -set enable_pcc=true -set opt_level=speed -target aarch64 -target x86_64 - -;; Equivalent to a Wasm `i64.load` from a static memory, but with some -;; redundant stuff that should be optimized away (x+0 -> x). -function %f0(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - ;; mock static memory: 4GiB range, plus 2GiB guard - mt1 = memory 0x1_8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - v2 ! mem(mt1, 0, 0) = load.i64 checked v0+0 - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v4 = iconst.i64 0 - v5 = iadd.i64 v3, v4 - v6 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v2, v5 - v7 = load.i64 checked v6 - return v7 -} - -;; GVN opportunity. -function %f1(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - ;; mock static memory: 4GiB range, plus 2GiB guard - mt1 = memory 0x1_8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - v2 ! mem(mt1, 0, 0) = load.i64 checked notrap readonly v0+0 - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v4 = iconst.i64 0 - v5 = iadd.i64 v3, v4 - v6 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v2, v5 - v7 = load.i64 checked v6 - - v8 = load.i64 checked notrap readonly v0+0 - v9 = uextend.i64 v1 - v10 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v8, v9 - v11 = load.i64 checked v10 - - v12 = iadd.i64 v7, v11 - - return v12 -} - -;; RLE opportunity. -function %f2(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - ;; mock static memory: 4GiB range, plus 2GiB guard - mt1 = memory 0x1_8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - v2 ! mem(mt1, 0, 0) = load.i64 checked notrap readonly aligned v0+0 - brif v1, block1, block2 - -block1: - v3 ! mem(mt1, 0, 0) = load.i64 checked notrap readonly aligned v0+0 - return v3 - -block2: - v4 ! mem(mt1, 0, 0) = load.i64 checked notrap readonly aligned v0+0 - return v4 -} - -function %f3(i64, i32) { - mt0 = struct 4 { 0: i32 ! range(32, 1, 3) } - -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 1): i32): - v2 ! range(32, 1, 1) = iconst.i32 1 - v3 ! range(32, 1, 2) = iadd.i32 v1, v2 - - v4 ! range(32, 1, 1) = iconst.i32 1 - v5 ! range(32, 1, 3) = iadd.i32 v1, v4 ;; should GVN onto v3. - - ;; v3/v5's facts should merge to the narrower range. - store.i32 checked v3, v0 - store.i32 checked v5, v0 - - return -} diff --git a/cranelift/filetests/filetests/pcc/succeed/shift.clif b/cranelift/filetests/filetests/pcc/succeed/shift.clif deleted file mode 100644 index 0fcf627464ef..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/shift.clif +++ /dev/null @@ -1,18 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i32) -> i32 { -block0(v0 ! range(32, 1, 0x100): i32): - v1 = iconst.i32 2 - v2 ! range(32, 4, 0x400) = ishl.i32 v0, v1 - return v2 -} - -function %f0(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 ! range(32, 0, 0xffff_ffff) = ishl.i32 v0, v1 - return v2 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/simple.clif b/cranelift/filetests/filetests/pcc/succeed/simple.clif deleted file mode 100644 index 80dc769899ef..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/simple.clif +++ /dev/null @@ -1,13 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %simple1(i64 vmctx, i32) -> i8 { - mt0 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! range(32, 0, 0xffff_ffff): i32): - v2 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 - v3 ! mem(mt0, 0, 0xffff_ffff) = iadd.i64 v0, v2 - v4 = load.i8 checked v3 - return v4 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/struct.clif b/cranelift/filetests/filetests/pcc/succeed/struct.clif deleted file mode 100644 index f53bdaff54d4..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/struct.clif +++ /dev/null @@ -1,20 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -function %f0(i64) -> i64 { - mt0 = struct 8 { 0: i64 ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64): - v1 ! mem(mt1, 0, 0) = load.i64 checked v0 - return v1 -} - -function %f1(i64, i64) { - mt0 = struct 8 { 0: i64 ! mem(mt1, 0, 0) } - mt1 = memory 0x1_0000_0000 -block0(v0 ! mem(mt0, 0, 0): i64, v1 ! mem(mt1, 0, 0): i64): - store.i64 checked v1, v0 - return -} diff --git a/cranelift/filetests/filetests/pcc/succeed/uextend-add-iconst.clif b/cranelift/filetests/filetests/pcc/succeed/uextend-add-iconst.clif deleted file mode 100644 index f7a62d9d765a..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/uextend-add-iconst.clif +++ /dev/null @@ -1,120 +0,0 @@ -test compile -set enable_multi_ret_implicit_sret -set enable_pcc=true -set opt_level=speed -target x86_64 - -;; v110 is a uextend'd iconst; v111 is a memtype base; v112 is that -;; base plus that fixed offset, and should be able to verify that its -;; offset is in 0..4GiB. In the fuzzbug that inspired this test, we -;; had a bare `iconst` with no range fact on it after optimization. - -function u0:2(i64 vmctx, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> i32, i32, i32, i32, i32, i32 fast { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0+8 - gv2 = load.i64 notrap aligned gv1 - gv3 ! mem(mt0, 0x0, 0x0) = vmctx - gv4 ! mem(mt1, 0x0, 0x0) = load.i64 notrap aligned readonly checked gv3+96 - mt0 = struct 104 { 96: i64 readonly ! mem(mt1, 0x0, 0x0) } - mt1 = memory 0x180000000 - sig0 = (i64 vmctx, i32 uext) system_v - sig1 = (i64 vmctx, i32 uext, i32 uext, i32 uext) -> i32 uext system_v - sig2 = (i64 vmctx, i32 uext, i32 uext) -> i32 uext system_v - sig3 = (i64 vmctx, i32 uext) -> i32 uext system_v - stack_limit = gv2 - -block0(v0 ! mem(mt0, 0x0, 0x0): i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v8: i32, v9: i32, v10: i32, v11: i32, v12: i32, v13: i32, v14: i32, v15: i32, v16: i32, v17: i32, v18: i32, v19: i32, v20: i32, v21: i32): - v77 -> v0 - v81 -> v0 - v85 -> v0 - v87 -> v0 - v91 -> v0 - v95 -> v0 - v97 -> v0 - v130 -> v0 - v78 = load.i32 notrap aligned table v77+176 - v127 = iconst.i32 0 - v79 = icmp eq v78, v127 ; v127 = 0 - v80 = uextend.i32 v79 - brif v80, block2, block3 - -block2: - trap user1 - -block3: - v82 = load.i32 notrap aligned table v81+176 - v83 = iconst.i32 1 - v84 = isub v82, v83 ; v83 = 1 - store notrap aligned table v84, v85+176 - jump block4 - -block4: - v88 = load.i32 notrap aligned table v87+176 - v128 = iconst.i32 0 - v89 = icmp eq v88, v128 ; v128 = 0 - v90 = uextend.i32 v89 - brif v90, block6, block7 - -block6: - trap user1 - -block7: - v92 = load.i32 notrap aligned table v91+176 - v93 = iconst.i32 1 - v94 = isub v92, v93 ; v93 = 1 - store notrap aligned table v94, v95+176 - v96 = iconst.i32 0xffff_3234 - v98 = load.i64 notrap aligned v97+104 - v129 = iconst.i64 0x0001_0000 - v99 = udiv v98, v129 ; v129 = 0x0001_0000 - v100 = ireduce.i32 v99 - v101 = iconst.i32 0x0001_0000 - v102 = imul v100, v101 ; v101 = 0x0001_0000 - v103 = iconst.i32 0x0005_ffee - v104 = iadd v103, v96 ; v103 = 0x0005_ffee, v96 = 0xffff_3234 - v105 = icmp ule v102, v104 - v106 = uextend.i32 v105 - brif v106, block9, block10 - -block10: - v107 = iconst.i32 0 - v108 = icmp.i32 sle v96, v107 ; v96 = 0xffff_3234, v107 = 0 - v109 = uextend.i32 v108 - brif v109, block9, block11 - -block11: - v110 ! range(64, 0x0, 0xffffffff) = uextend.i64 v96 ; v96 = 0xffff_3234 - v111 ! mem(mt1, 0x0, 0x0) = load.i64 notrap aligned readonly checked v130+96 - v112 ! mem(mt1, 0x0, 0xffffffff) = iadd v111, v110 - v113 ! range(64, 0x5ffe6, 0x5ffe6) = iconst.i64 0x0005_ffe6 - v114 ! mem(mt1, 0x5ffe6, 0x10005ffe5) = iadd v112, v113 ; v113 = 0x0005_ffe6 - v115 = uload8.i64 little checked heap v114 - jump block8(v115) - -block9: - v116 = iconst.i64 0 - jump block8(v116) ; v116 = 0 - -block8(v117: i64): - v118 = fcvt_from_uint.f32 v117 - v86 -> v118 - jump block5 - -block5: - v121 = iconst.i32 0 - v22 -> v121 - v122 = iconst.i32 0 - v23 -> v122 - v123 = iconst.i32 0 - v24 -> v123 - v124 = iconst.i32 0 - v25 -> v124 - v125 = iconst.i32 0 - v26 -> v125 - v126 = iconst.i32 0 - v27 -> v126 - jump block1 - -block1: - return v22, v23, v24, v25, v26, v27 ; v22 = 0, v23 = 0, v24 = 0, v25 = 0, v26 = 0, v27 = 0 -} diff --git a/cranelift/filetests/filetests/pcc/succeed/vmctx.clif b/cranelift/filetests/filetests/pcc/succeed/vmctx.clif deleted file mode 100644 index ec05f22fa6c0..000000000000 --- a/cranelift/filetests/filetests/pcc/succeed/vmctx.clif +++ /dev/null @@ -1,21 +0,0 @@ -test compile -set enable_pcc=true -target aarch64 -target x86_64 - -;; Equivalent to a Wasm `i64.load` from a static memory. -function %f0(i64, i32) -> i64 { - ;; mock vmctx struct: - mt0 = struct 8 { 0: i64 readonly ! mem(mt1, 0, 0) } - ;; mock static memory: 4GiB range, plus 2GiB guard - mt1 = memory 0x1_8000_0000 - -block0(v0 ! mem(mt0, 0, 0): i64, v1: i32): - ;; Compute the address: base + offset. Guard region (2GiB) is - ;; sufficient for an 8-byte I64 load. - v2 ! mem(mt1, 0, 0) = load.i64 checked v0+0 ;; base pointer - v3 ! range(64, 0, 0xffff_ffff) = uextend.i64 v1 ;; offset - v4 ! mem(mt1, 0, 0xffff_ffff) = iadd.i64 v2, v3 - v5 = load.i64 checked v4 - return v5 -} diff --git a/cranelift/reader/src/parser.rs b/cranelift/reader/src/parser.rs index 99ee3ad41852..bbd2d08828d7 100644 --- a/cranelift/reader/src/parser.rs +++ b/cranelift/reader/src/parser.rs @@ -9,21 +9,19 @@ use crate::testcommand::TestCommand; use crate::testfile::{Comment, Details, Feature, TestFile}; use cranelift_codegen::data_value::DataValue; use cranelift_codegen::entity::{EntityRef, PrimaryMap}; -use cranelift_codegen::ir::entities::{AnyEntity, DynamicType, MemoryType}; +use cranelift_codegen::ir::entities::{AnyEntity, DynamicType}; use cranelift_codegen::ir::immediates::{ Ieee16, Ieee32, Ieee64, Ieee128, Imm64, Offset32, Uimm32, Uimm64, }; use cranelift_codegen::ir::instructions::{InstructionData, InstructionFormat, VariableArgs}; -use cranelift_codegen::ir::pcc::{BaseExpr, Expr, Fact}; use cranelift_codegen::ir::{self, StackSlotKey, UserExternalNameRef}; use cranelift_codegen::ir::{DebugTag, types::*}; use cranelift_codegen::ir::{ AbiParam, ArgumentExtension, ArgumentPurpose, Block, BlockArg, Constant, ConstantData, DynamicStackSlot, DynamicStackSlotData, DynamicTypeData, ExtFuncData, ExternalName, FuncRef, - Function, GlobalValue, GlobalValueData, JumpTableData, MemFlags, MemoryTypeData, - MemoryTypeField, Opcode, SigRef, Signature, StackSlot, StackSlotData, StackSlotKind, - UserFuncName, Value, types, + Function, GlobalValue, GlobalValueData, JumpTableData, MemFlags, Opcode, SigRef, Signature, + StackSlot, StackSlotData, StackSlotKind, UserFuncName, Value, types, }; use cranelift_codegen::isa::{self, CallConv}; use cranelift_codegen::packed_option::ReservedValue; @@ -309,13 +307,7 @@ impl Context { } // Allocate a global value slot. - fn add_gv( - &mut self, - gv: GlobalValue, - data: GlobalValueData, - maybe_fact: Option, - loc: Location, - ) -> ParseResult<()> { + fn add_gv(&mut self, gv: GlobalValue, data: GlobalValueData, loc: Location) -> ParseResult<()> { self.map.def_gv(gv, loc)?; while self.function.global_values.next_key().index() <= gv.index() { self.function.create_global_value(GlobalValueData::Symbol { @@ -326,19 +318,6 @@ impl Context { }); } self.function.global_values[gv] = data; - if let Some(fact) = maybe_fact { - self.function.global_value_facts[gv] = Some(fact); - } - Ok(()) - } - - // Allocate a memory-type slot. - fn add_mt(&mut self, mt: MemoryType, data: MemoryTypeData, loc: Location) -> ParseResult<()> { - self.map.def_mt(mt, loc)?; - while self.function.memory_types.next_key().index() <= mt.index() { - self.function.create_memory_type(MemoryTypeData::default()); - } - self.function.memory_types[mt] = data; Ok(()) } @@ -646,17 +625,6 @@ impl<'a> Parser<'a> { err!(self.loc, err_msg) } - // Match and consume a memory-type reference. - fn match_mt(&mut self, err_msg: &str) -> ParseResult { - if let Some(Token::MemoryType(mt)) = self.token() { - self.consume(); - if let Some(mt) = MemoryType::with_number(mt) { - return Ok(mt); - } - } - err!(self.loc, err_msg) - } - // Match and consume a constant reference. fn match_constant(&mut self) -> ParseResult { if let Some(Token::Constant(c)) = self.token() { @@ -1497,12 +1465,7 @@ impl<'a> Parser<'a> { Some(Token::GlobalValue(..)) => { self.start_gathering_comments(); self.parse_global_value_decl() - .and_then(|(gv, dat, maybe_fact)| ctx.add_gv(gv, dat, maybe_fact, self.loc)) - } - Some(Token::MemoryType(..)) => { - self.start_gathering_comments(); - self.parse_memory_type_decl() - .and_then(|(mt, dat)| ctx.add_mt(mt, dat, self.loc)) + .and_then(|(gv, dat)| ctx.add_gv(gv, dat, self.loc)) } Some(Token::SigRef(..)) => { self.start_gathering_comments(); @@ -1635,25 +1598,16 @@ impl<'a> Parser<'a> { // Parse a global value decl. // - // global-val-decl ::= * GlobalValue(gv) [ "!" fact ] "=" global-val-desc + // global-val-decl ::= * GlobalValue(gv) "=" global-val-desc // global-val-desc ::= "vmctx" // | "load" "." type "notrap" "aligned" GlobalValue(base) [offset] // | "iadd_imm" "(" GlobalValue(base) ")" imm64 // | "symbol" ["colocated"] name + imm64 // | "dyn_scale_target_const" "." type // - fn parse_global_value_decl( - &mut self, - ) -> ParseResult<(GlobalValue, GlobalValueData, Option)> { + fn parse_global_value_decl(&mut self) -> ParseResult<(GlobalValue, GlobalValueData)> { let gv = self.match_gv("expected global value number: gv«n»")?; - let fact = if self.token() == Some(Token::Bang) { - self.consume(); - Some(self.parse_fact()?) - } else { - None - }; - self.match_token(Token::Equal, "expected '=' in global value declaration")?; let data = match self.match_any_identifier("expected global value kind")? { @@ -1724,114 +1678,7 @@ impl<'a> Parser<'a> { self.token(); self.claim_gathered_comments(gv); - Ok((gv, data, fact)) - } - - // Parse one field definition in a memory-type struct decl. - // - // memory-type-field ::= offset ":" type ["readonly"] [ "!" fact ] - // offset ::= uimm64 - fn parse_memory_type_field(&mut self) -> ParseResult { - let offset: u64 = self - .match_uimm64( - "expected u64 constant value for field offset in struct memory-type declaration", - )? - .into(); - self.match_token( - Token::Colon, - "expected colon after field offset in struct memory-type declaration", - )?; - let ty = self.match_type("expected type for field in struct memory-type declaration")?; - let readonly = if self.token() == Some(Token::Identifier("readonly")) { - self.consume(); - true - } else { - false - }; - let fact = if self.token() == Some(Token::Bang) { - self.consume(); - let fact = self.parse_fact()?; - Some(fact) - } else { - None - }; - Ok(MemoryTypeField { - offset, - ty, - readonly, - fact, - }) - } - - // Parse a memory-type decl. - // - // memory-type-decl ::= MemoryType(mt) "=" memory-type-desc - // memory-type-desc ::= "struct" size "{" memory-type-field,* "}" - // | "memory" size - // | "dynamic_memory" GlobalValue "+" offset - // | "empty" - // size ::= uimm64 - // offset ::= uimm64 - fn parse_memory_type_decl(&mut self) -> ParseResult<(MemoryType, MemoryTypeData)> { - let mt = self.match_mt("expected memory type number: mt«n»")?; - self.match_token(Token::Equal, "expected '=' in memory type declaration")?; - - let data = match self.token() { - Some(Token::Identifier("struct")) => { - self.consume(); - let size: u64 = self.match_uimm64("expected u64 constant value for struct size in struct memory-type declaration")?.into(); - self.match_token(Token::LBrace, "expected opening brace to start struct fields in struct memory-type declaration")?; - let mut fields = vec![]; - while self.token() != Some(Token::RBrace) { - let field = self.parse_memory_type_field()?; - fields.push(field); - if self.token() == Some(Token::Comma) { - self.consume(); - } else { - break; - } - } - self.match_token( - Token::RBrace, - "expected closing brace after struct fields in struct memory-type declaration", - )?; - MemoryTypeData::Struct { size, fields } - } - Some(Token::Identifier("memory")) => { - self.consume(); - let size: u64 = self.match_uimm64("expected u64 constant value for size in static-memory memory-type declaration")?.into(); - MemoryTypeData::Memory { size } - } - Some(Token::Identifier("dynamic_memory")) => { - self.consume(); - let gv = self.match_gv( - "expected a global value for `dynamic_memory` memory-type declaration", - )?; - self.match_token( - Token::Plus, - "expected `+` after global value in `dynamic_memory` memory-type declaration", - )?; - let size: u64 = self.match_uimm64("expected u64 constant value for size offset in `dynamic_memory` memory-type declaration")?.into(); - MemoryTypeData::DynamicMemory { gv, size } - } - Some(Token::Identifier("empty")) => { - self.consume(); - MemoryTypeData::Empty - } - other => { - return err!( - self.loc, - "Unknown memory type declaration kind '{:?}'", - other - ); - } - }; - - // Collect any trailing comments. - self.token(); - self.claim_gathered_comments(mt); - - Ok((mt, data)) + Ok((gv, data)) } // Parse a signature decl. @@ -2160,7 +2007,7 @@ impl<'a> Parser<'a> { // between the parsing of value aliases and the parsing of instructions. // // inst-results ::= Value(v) { "," Value(v) } - let results = self.parse_inst_results(ctx)?; + let results = self.parse_inst_results()?; for result in &results { while ctx.function.dfg.num_values() <= result.index() { @@ -2215,24 +2062,15 @@ impl<'a> Parser<'a> { // Parse a single block parameter declaration, and append it to `block`. // - // block-param ::= * Value(v) [ "!" fact ] ":" Type(t) arg-loc? + // block-param ::= * Value(v) ":" Type(t) arg-loc? // arg-loc ::= "[" value-location "]" // fn parse_block_param(&mut self, ctx: &mut Context, block: Block) -> ParseResult<()> { - // block-param ::= * Value(v) [ "!" fact ] ":" Type(t) arg-loc? + // block-param ::= * Value(v) ":" Type(t) arg-loc? let v = self.match_value("block argument must be a value")?; let v_location = self.loc; - // block-param ::= Value(v) * [ "!" fact ] ":" Type(t) arg-loc? - let fact = if self.token() == Some(Token::Bang) { - self.consume(); - // block-param ::= Value(v) [ "!" * fact ] ":" Type(t) arg-loc? - Some(self.parse_fact()?) - } else { - None - }; self.match_token(Token::Colon, "expected ':' after block argument")?; - // block-param ::= Value(v) [ "!" fact ] ":" * Type(t) arg-loc? - + // block-param ::= Value(v) ":" * Type(t) arg-loc? while ctx.function.dfg.num_values() <= v.index() { ctx.function.dfg.make_invalid_value_for_parser(); } @@ -2241,246 +2079,15 @@ impl<'a> Parser<'a> { // Allocate the block argument. ctx.function.dfg.append_block_param_for_parser(block, t, v); ctx.map.def_value(v, v_location)?; - ctx.function.dfg.facts[v] = fact; Ok(()) } - // Parse a "fact" for proof-carrying code, attached to a value. - // - // fact ::= "range" "(" bit-width "," min-value "," max-value ")" - // | "dynamic_range" "(" bit-width "," expr "," expr ")" - // | "mem" "(" memory-type "," mt-offset "," mt-offset [ "," "nullable" ] ")" - // | "dynamic_mem" "(" memory-type "," expr "," expr [ "," "nullable" ] ")" - // | "conflict" - // bit-width ::= uimm64 - // min-value ::= uimm64 - // max-value ::= uimm64 - // valid-range ::= uimm64 - // mt-offset ::= uimm64 - fn parse_fact(&mut self) -> ParseResult { - match self.token() { - Some(Token::Identifier("range")) => { - self.consume(); - self.match_token(Token::LPar, "`range` fact needs an opening `(`")?; - let bit_width: u64 = self - .match_uimm64("expected a bit-width value for `range` fact")? - .into(); - self.match_token(Token::Comma, "expected a comma")?; - let min: u64 = self - .match_uimm64("expected a min value for `range` fact")? - .into(); - self.match_token(Token::Comma, "expected a comma")?; - let max: u64 = self - .match_uimm64("expected a max value for `range` fact")? - .into(); - self.match_token(Token::RPar, "`range` fact needs a closing `)`")?; - let bit_width_max = match bit_width { - x if x > 64 => { - return Err(self.error("bitwidth must be <= 64 bits on a `range` fact")); - } - 64 => u64::MAX, - x => (1u64 << x) - 1, - }; - if min > max { - return Err(self.error( - "min value must be less than or equal to max value on a `range` fact", - )); - } - if max > bit_width_max { - return Err( - self.error("max value is out of range for bitwidth on a `range` fact") - ); - } - Ok(Fact::Range { - bit_width: u16::try_from(bit_width).unwrap(), - min, - max, - }) - } - Some(Token::Identifier("dynamic_range")) => { - self.consume(); - self.match_token(Token::LPar, "`dynamic_range` fact needs an opening `(`")?; - let bit_width: u64 = self - .match_uimm64("expected a bit-width value for `dynamic_range` fact")? - .into(); - self.match_token(Token::Comma, "expected a comma")?; - let min = self.parse_expr()?; - self.match_token(Token::Comma, "expected a comma")?; - let max = self.parse_expr()?; - self.match_token(Token::RPar, "`dynamic_range` fact needs a closing `)`")?; - Ok(Fact::DynamicRange { - bit_width: u16::try_from(bit_width).unwrap(), - min, - max, - }) - } - Some(Token::Identifier("mem")) => { - self.consume(); - self.match_token(Token::LPar, "expected a `(`")?; - let ty = self.match_mt("expected a memory type for `mem` fact")?; - self.match_token( - Token::Comma, - "expected a comma after memory type in `mem` fact", - )?; - let min_offset: u64 = self - .match_uimm64("expected a uimm64 minimum pointer offset for `mem` fact")? - .into(); - self.match_token(Token::Comma, "expected a comma after offset in `mem` fact")?; - let max_offset: u64 = self - .match_uimm64("expected a uimm64 maximum pointer offset for `mem` fact")? - .into(); - let nullable = if self.token() == Some(Token::Comma) { - self.consume(); - self.match_token( - Token::Identifier("nullable"), - "expected `nullable` in last optional field of `dynamic_mem`", - )?; - true - } else { - false - }; - self.match_token(Token::RPar, "expected a `)`")?; - Ok(Fact::Mem { - ty, - min_offset, - max_offset, - nullable, - }) - } - Some(Token::Identifier("dynamic_mem")) => { - self.consume(); - self.match_token(Token::LPar, "expected a `(`")?; - let ty = self.match_mt("expected a memory type for `dynamic_mem` fact")?; - self.match_token( - Token::Comma, - "expected a comma after memory type in `dynamic_mem` fact", - )?; - let min = self.parse_expr()?; - self.match_token( - Token::Comma, - "expected a comma after offset in `dynamic_mem` fact", - )?; - let max = self.parse_expr()?; - let nullable = if self.token() == Some(Token::Comma) { - self.consume(); - self.match_token( - Token::Identifier("nullable"), - "expected `nullable` in last optional field of `dynamic_mem`", - )?; - true - } else { - false - }; - self.match_token(Token::RPar, "expected a `)`")?; - Ok(Fact::DynamicMem { - ty, - min, - max, - nullable, - }) - } - Some(Token::Identifier("def")) => { - self.consume(); - self.match_token(Token::LPar, "expected a `(`")?; - let value = self.match_value("expected a value number in `def` fact")?; - self.match_token(Token::RPar, "expected a `)`")?; - Ok(Fact::Def { value }) - } - Some(Token::Identifier("compare")) => { - self.consume(); - self.match_token(Token::LPar, "expected a `(`")?; - let kind = self.match_enum("expected intcc condition code in `compare` fact")?; - self.match_token( - Token::Comma, - "expected comma in `compare` fact after condition code", - )?; - let lhs = self.parse_expr()?; - self.match_token(Token::Comma, "expected comma in `compare` fact after LHS")?; - let rhs = self.parse_expr()?; - self.match_token(Token::RPar, "expected a `)`")?; - Ok(Fact::Compare { kind, lhs, rhs }) - } - Some(Token::Identifier("conflict")) => { - self.consume(); - Ok(Fact::Conflict) - } - _ => Err(self.error( - "expected a `range`, 'dynamic_range', `mem`, `dynamic_mem`, `def`, `compare` or `conflict` fact", - )), - } - } - - // Parse a dynamic expression used in some kinds of PCC facts. - // - // expr ::= base-expr - // | base-expr + uimm64 // but in-range for imm64 - // | base-expr - uimm64 // but in-range for imm64 - // | imm64 - fn parse_expr(&mut self) -> ParseResult { - if let Some(Token::Integer(_)) = self.token() { - let offset: i64 = self - .match_imm64("expected imm64 for dynamic expression")? - .into(); - Ok(Expr { - base: BaseExpr::None, - offset, - }) - } else { - let base = self.parse_base_expr()?; - match self.token() { - Some(Token::Plus) => { - self.consume(); - let offset: u64 = self - .match_uimm64( - "expected uimm64 in imm64 range for offset in dynamic expression", - )? - .into(); - let offset: i64 = i64::try_from(offset).map_err(|_| { - self.error("integer offset in dynamic expression is out of range") - })?; - Ok(Expr { base, offset }) - } - Some(Token::Integer(x)) if x.starts_with("-") => { - let offset: i64 = self - .match_imm64("expected an imm64 range for offset in dynamic expression")? - .into(); - Ok(Expr { base, offset }) - } - _ => Ok(Expr { base, offset: 0 }), - } - } - } - - // Parse the base part of a dynamic expression, used in some PCC facts. - // - // base-expr ::= GlobalValue(base) - // | Value(base) - // | "max" - // | (epsilon) - fn parse_base_expr(&mut self) -> ParseResult { - match self.token() { - Some(Token::Identifier("max")) => { - self.consume(); - Ok(BaseExpr::Max) - } - Some(Token::GlobalValue(..)) => { - let gv = self.match_gv("expected global value")?; - Ok(BaseExpr::GlobalValue(gv)) - } - Some(Token::Value(..)) => { - let value = self.match_value("expected value")?; - Ok(BaseExpr::Value(value)) - } - _ => Ok(BaseExpr::None), - } - } - // Parse instruction results and return them. // // inst-results ::= Value(v) { "," Value(v) } // - fn parse_inst_results(&mut self, ctx: &mut Context) -> ParseResult> { + fn parse_inst_results(&mut self) -> ParseResult> { // Result value numbers. let mut results = SmallVec::new(); @@ -2491,29 +2098,11 @@ impl<'a> Parser<'a> { results.push(v); - let fact = if self.token() == Some(Token::Bang) { - self.consume(); - // block-param ::= Value(v) [ "!" * fact ] ":" Type(t) arg-loc? - Some(self.parse_fact()?) - } else { - None - }; - ctx.function.dfg.facts[v] = fact; - // inst-results ::= Value(v) * { "," Value(v) } while self.optional(Token::Comma) { // inst-results ::= Value(v) { "," * Value(v) } let v = self.match_value("expected result value")?; results.push(v); - - let fact = if self.token() == Some(Token::Bang) { - self.consume(); - // block-param ::= Value(v) [ "!" * fact ] ":" Type(t) arg-loc? - Some(self.parse_fact()?) - } else { - None - }; - ctx.function.dfg.facts[v] = fact; } } diff --git a/cranelift/reader/src/sourcemap.rs b/cranelift/reader/src/sourcemap.rs index 2c79de5ea471..38c578c40135 100644 --- a/cranelift/reader/src/sourcemap.rs +++ b/cranelift/reader/src/sourcemap.rs @@ -10,8 +10,7 @@ use crate::error::{Location, ParseResult}; use crate::lexer::split_entity_name; use cranelift_codegen::ir::entities::{AnyEntity, DynamicType}; use cranelift_codegen::ir::{ - Block, Constant, DynamicStackSlot, FuncRef, GlobalValue, JumpTable, MemoryType, SigRef, - StackSlot, Value, + Block, Constant, DynamicStackSlot, FuncRef, GlobalValue, JumpTable, SigRef, StackSlot, Value, }; use std::collections::HashMap; @@ -170,11 +169,6 @@ impl SourceMap { self.def_entity(entity.into(), loc) } - /// Define the memory type `entity`. - pub fn def_mt(&mut self, entity: MemoryType, loc: Location) -> ParseResult<()> { - self.def_entity(entity.into(), loc) - } - /// Define the signature `entity`. pub fn def_sig(&mut self, entity: SigRef, loc: Location) -> ParseResult<()> { self.def_entity(entity.into(), loc) diff --git a/crates/cli-flags/src/lib.rs b/crates/cli-flags/src/lib.rs index c543771bc1a2..d6882bc167cf 100644 --- a/crates/cli-flags/src/lib.rs +++ b/crates/cli-flags/src/lib.rs @@ -236,8 +236,6 @@ wasmtime_option_group! { pub cache_config: Option, /// Whether or not to enable parallel compilation of modules. pub parallel_compilation: Option, - /// Whether to enable proof-carrying code (PCC)-based validation. - pub pcc: Option, /// Controls whether native unwind information is present in compiled /// object files. pub native_unwind_info: Option, @@ -817,11 +815,6 @@ impl CommonOptions { enable => config.cranelift_nan_canonicalization(enable), true => err, } - match_feature! { - ["cranelift" : self.codegen.pcc] - enable => config.cranelift_pcc(enable), - true => err, - } self.enable_wasm_features(&mut config)?; diff --git a/crates/cranelift/src/bounds_checks.rs b/crates/cranelift/src/bounds_checks.rs index 4935a82f9ce7..2743dd861dbc 100644 --- a/crates/cranelift/src/bounds_checks.rs +++ b/crates/cranelift/src/bounds_checks.rs @@ -29,7 +29,6 @@ use Reachability::*; use cranelift_codegen::{ cursor::{Cursor, FuncCursor}, ir::{self, InstBuilder, RelSourceLoc, condcodes::IntCC}, - ir::{Expr, Fact}, }; use cranelift_frontend::FunctionBuilder; @@ -159,7 +158,6 @@ pub fn bounds_check_and_compute_addr( backwards_offset, ir::types::I32, env.pointer_type(), - false, &mut builder.cursor(), trap, ); @@ -180,12 +178,10 @@ fn bounds_check_field_access( trap: ir::TrapCode, ) -> Reachability { let pointer_bit_width = u16::try_from(env.pointer_type().bits()).unwrap(); - let bound_gv = heap.bound; - let orig_index = index; + let clif_memory_traps_enabled = env.clif_memory_traps_enabled(); let spectre_mitigations_enabled = env.heap_access_spectre_mitigation() && clif_memory_traps_enabled; - let pcc = env.proof_carrying_code(); let host_page_size_log2 = env.target_config().page_size_align_log2; let can_use_virtual_memory = heap @@ -206,7 +202,6 @@ fn bounds_check_field_access( index, heap.index_type(), env.pointer_type(), - heap.pcc_memory_type.is_some(), &mut builder.cursor(), trap, ); @@ -223,57 +218,10 @@ fn bounds_check_field_access( OobBehavior::ExplicitTrap }; - let make_compare = |builder: &mut FunctionBuilder, - compare_kind: IntCC, - lhs: ir::Value, - lhs_off: Option, - rhs: ir::Value, - rhs_off: Option| { - let result = builder.ins().icmp(compare_kind, lhs, rhs); - if pcc { - // Name the original value as a def of the SSA value; - // if the value was extended, name that as well with a - // dynamic range, overwriting the basic full-range - // fact that we previously put on the uextend. - builder.func.dfg.facts[orig_index] = Some(Fact::Def { value: orig_index }); - if index != orig_index { - builder.func.dfg.facts[index] = Some(Fact::value(pointer_bit_width, orig_index)); - } - - // Create a fact on the LHS that is a "trivial symbolic - // fact": v1 has range v1+LHS_off..=v1+LHS_off - builder.func.dfg.facts[lhs] = Some(Fact::value_offset( - pointer_bit_width, - orig_index, - lhs_off.unwrap(), - )); - // If the RHS is a symbolic value (v1 or gv1), we can - // emit a Compare fact. - if let Some(rhs) = builder.func.dfg.facts[rhs] - .as_ref() - .and_then(|f| f.as_symbol()) - { - builder.func.dfg.facts[result] = Some(Fact::Compare { - kind: compare_kind, - lhs: Expr::offset(&Expr::value(orig_index), lhs_off.unwrap()).unwrap(), - rhs: Expr::offset(rhs, rhs_off.unwrap()).unwrap(), - }); - } - // Likewise, if the RHS is a constant, we can emit a - // Compare fact. - if let Some(k) = builder.func.dfg.facts[rhs] - .as_ref() - .and_then(|f| f.as_const(pointer_bit_width)) - { - builder.func.dfg.facts[result] = Some(Fact::Compare { - kind: compare_kind, - lhs: Expr::offset(&Expr::value(orig_index), lhs_off.unwrap()).unwrap(), - rhs: Expr::constant((k as i64).checked_add(rhs_off.unwrap()).unwrap()), - }); - } - } - result - }; + let make_compare = + |builder: &mut FunctionBuilder, compare_kind: IntCC, lhs: ir::Value, rhs: ir::Value| { + builder.ins().icmp(compare_kind, lhs, rhs) + }; // We need to emit code that will trap (or compute an address that will trap // when accessed) if @@ -365,7 +313,6 @@ fn bounds_check_field_access( env.pointer_type(), index, offset, - AddrPcc::static32(heap.pcc_memory_type, memory_reservation + memory_guard_size), )); } @@ -378,7 +325,6 @@ fn bounds_check_field_access( env.pointer_type(), index, offset, - AddrPcc::static32(heap.pcc_memory_type, memory_reservation + memory_guard_size), )); } @@ -409,17 +355,11 @@ fn bounds_check_field_access( let adjusted_bound_value = builder .ins() .iconst(env.pointer_type(), adjusted_bound as i64); - if pcc { - builder.func.dfg.facts[adjusted_bound_value] = - Some(Fact::constant(pointer_bit_width, adjusted_bound)); - } let oob = make_compare( builder, IntCC::UnsignedGreaterThan, index, - Some(0), adjusted_bound_value, - Some(0), ); return Reachable(explicit_check_oob_condition_and_compute_addr( env, @@ -427,9 +367,7 @@ fn bounds_check_field_access( heap, index, offset, - access_size, oob_behavior, - AddrPcc::static32(heap.pcc_memory_type, memory_reservation), oob, trap, )); @@ -447,23 +385,14 @@ fn bounds_check_field_access( // largely only applicable for native platforms. if offset_and_size == 1 && !env.is_pulley() { let bound = get_dynamic_heap_bound(builder, env, heap); - let oob = make_compare( - builder, - IntCC::UnsignedGreaterThanOrEqual, - index, - Some(0), - bound, - Some(0), - ); + let oob = make_compare(builder, IntCC::UnsignedGreaterThanOrEqual, index, bound); return Reachable(explicit_check_oob_condition_and_compute_addr( env, builder, heap, index, offset, - access_size, oob_behavior, - AddrPcc::dynamic(heap.pcc_memory_type, bound_gv), oob, trap, )); @@ -496,23 +425,14 @@ fn bounds_check_field_access( // will all emit the same `index > bound` check, which we can GVN. if can_use_virtual_memory && offset_and_size <= memory_guard_size { let bound = get_dynamic_heap_bound(builder, env, heap); - let oob = make_compare( - builder, - IntCC::UnsignedGreaterThan, - index, - Some(0), - bound, - Some(0), - ); + let oob = make_compare(builder, IntCC::UnsignedGreaterThan, index, bound); return Reachable(explicit_check_oob_condition_and_compute_addr( env, builder, heap, index, offset, - access_size, oob_behavior, - AddrPcc::dynamic(heap.pcc_memory_type, bound_gv), oob, trap, )); @@ -529,35 +449,15 @@ fn bounds_check_field_access( let bound = get_dynamic_heap_bound(builder, env, heap); let adjustment = offset_and_size as i64; let adjustment_value = builder.ins().iconst(env.pointer_type(), adjustment); - if pcc { - builder.func.dfg.facts[adjustment_value] = - Some(Fact::constant(pointer_bit_width, offset_and_size)); - } let adjusted_bound = builder.ins().isub(bound, adjustment_value); - if pcc { - builder.func.dfg.facts[adjusted_bound] = Some(Fact::global_value_offset( - pointer_bit_width, - bound_gv, - -adjustment, - )); - } - let oob = make_compare( - builder, - IntCC::UnsignedGreaterThan, - index, - Some(0), - adjusted_bound, - Some(adjustment), - ); + let oob = make_compare(builder, IntCC::UnsignedGreaterThan, index, adjusted_bound); return Reachable(explicit_check_oob_condition_and_compute_addr( env, builder, heap, index, offset, - access_size, oob_behavior, - AddrPcc::dynamic(heap.pcc_memory_type, bound_gv), oob, trap, )); @@ -573,36 +473,16 @@ fn bounds_check_field_access( // Explicit cast from u64 to i64: we just want the raw // bits, and iconst takes an `Imm64`. .iconst(env.pointer_type(), offset_and_size as i64); - if pcc { - builder.func.dfg.facts[access_size_val] = - Some(Fact::constant(pointer_bit_width, offset_and_size)); - } let adjusted_index = env.uadd_overflow_trap(builder, index, access_size_val, trap); - if pcc { - builder.func.dfg.facts[adjusted_index] = Some(Fact::value_offset( - pointer_bit_width, - index, - i64::try_from(offset_and_size).unwrap(), - )); - } let bound = get_dynamic_heap_bound(builder, env, heap); - let oob = make_compare( - builder, - IntCC::UnsignedGreaterThan, - adjusted_index, - i64::try_from(offset_and_size).ok(), - bound, - Some(0), - ); + let oob = make_compare(builder, IntCC::UnsignedGreaterThan, adjusted_index, bound); Reachable(explicit_check_oob_condition_and_compute_addr( env, builder, heap, index, offset, - access_size, oob_behavior, - AddrPcc::dynamic(heap.pcc_memory_type, bound_gv), oob, trap, )) @@ -614,46 +494,20 @@ fn get_dynamic_heap_bound( env: &mut FuncEnvironment<'_>, heap: &HeapData, ) -> ir::Value { - let enable_pcc = heap.pcc_memory_type.is_some(); - - let (value, gv) = match heap.memory.static_heap_size() { + match heap.memory.static_heap_size() { // The heap has a constant size, no need to actually load the - // bound. TODO: this is currently disabled for PCC because we - // can't easily prove that the GV load indeed results in a - // constant (that information is lost in the CLIF). We'll want - // to create an `iconst` GV expression kind to reify this fact - // in the GV, then re-enable this opt. (Or, alternately, - // compile such memories with a static-bound memtype and - // facts.) - Some(max_size) if !enable_pcc => ( - builder.ins().iconst(env.pointer_type(), max_size as i64), - heap.bound, - ), + // bound. + Some(max_size) => builder.ins().iconst(env.pointer_type(), max_size as i64), // Load the heap bound from its global variable. - _ => ( - builder.ins().global_value(env.pointer_type(), heap.bound), - heap.bound, - ), - }; - - // If proof-carrying code is enabled, apply a fact to the range to - // tie it to the GV. - if enable_pcc { - builder.func.dfg.facts[value] = Some(Fact::global_value( - u16::try_from(env.pointer_type().bits()).unwrap(), - gv, - )); + _ => builder.ins().global_value(env.pointer_type(), heap.bound), } - - value } fn cast_index_to_pointer_ty( index: ir::Value, index_ty: ir::Type, pointer_ty: ir::Type, - pcc: bool, pos: &mut FuncCursor, trap: ir::TrapCode, ) -> ir::Value { @@ -666,7 +520,7 @@ fn cast_index_to_pointer_ty( // larger than 2**32 then that's guaranteed to be out-of-bounds, otherwise we // `ireduce` the index. // - // Also note that at this time this branch doesn't support pcc nor the + // Also note that at this time this branch doesn't support the // value-label-ranges of the below path. // // Finally, note that the returned `low_bits` here are still subject to an @@ -686,14 +540,6 @@ fn cast_index_to_pointer_ty( // Convert `index` to `addr_ty`. let extended_index = pos.ins().uextend(pointer_ty, index); - // Add a range fact on the extended value. - if pcc { - pos.func.dfg.facts[extended_index] = Some(Fact::max_range_for_width_extended( - u16::try_from(index_ty.bits()).unwrap(), - u16::try_from(pointer_ty.bits()).unwrap(), - )); - } - // Add debug value-label alias so that debuginfo can name the extended // value as the address let loc = pos.srcloc(); @@ -706,25 +552,6 @@ fn cast_index_to_pointer_ty( extended_index } -/// Which facts do we want to emit for proof-carrying code, if any, on -/// address computations? -#[derive(Clone, Copy, Debug)] -enum AddrPcc { - /// A 32-bit static memory with the given size. - Static32(ir::MemoryType, u64), - /// Dynamic bounds-check, with actual memory size (the `GlobalValue`) - /// expressed symbolically. - Dynamic(ir::MemoryType, ir::GlobalValue), -} -impl AddrPcc { - fn static32(memory_type: Option, size: u64) -> Option { - memory_type.map(|ty| AddrPcc::Static32(ty, size)) - } - fn dynamic(memory_type: Option, bound: ir::GlobalValue) -> Option { - memory_type.map(|ty| AddrPcc::Dynamic(ty, bound)) - } -} - /// What to do on out-of-bounds for the /// `explicit_check_oob_condition_and_compute_addr` function below. enum OobBehavior { @@ -749,10 +576,7 @@ fn explicit_check_oob_condition_and_compute_addr( heap: &HeapData, index: ir::Value, offset: u32, - access_size: u8, oob_behavior: OobBehavior, - // Whether we're emitting PCC facts. - pcc: Option, // The `i8` boolean value that is non-zero when the heap access is out of // bounds (and therefore we should trap) and is zero when the heap access is // in bounds (and therefore we can proceed). @@ -764,7 +588,7 @@ fn explicit_check_oob_condition_and_compute_addr( } let addr_ty = env.pointer_type(); - let mut addr = compute_addr(&mut builder.cursor(), heap, addr_ty, index, offset, pcc); + let mut addr = compute_addr(&mut builder.cursor(), heap, addr_ty, index, offset); if let OobBehavior::ConditionallyLoadFromZero { select_spectre_guard, @@ -782,37 +606,6 @@ fn explicit_check_oob_condition_and_compute_addr( } else { builder.ins().select(oob_condition, null, addr) }; - - match pcc { - None => {} - Some(AddrPcc::Static32(ty, size)) => { - builder.func.dfg.facts[null] = - Some(Fact::constant(u16::try_from(addr_ty.bits()).unwrap(), 0)); - builder.func.dfg.facts[addr] = Some(Fact::Mem { - ty, - min_offset: 0, - max_offset: size.checked_sub(u64::from(access_size)).unwrap(), - nullable: true, - }); - } - Some(AddrPcc::Dynamic(ty, gv)) => { - builder.func.dfg.facts[null] = - Some(Fact::constant(u16::try_from(addr_ty.bits()).unwrap(), 0)); - builder.func.dfg.facts[addr] = Some(Fact::DynamicMem { - ty, - min: Expr::constant(0), - max: Expr::offset( - &Expr::global_value(gv), - i64::try_from(env.tunables().memory_guard_size) - .unwrap() - .checked_sub(i64::from(access_size)) - .unwrap(), - ) - .unwrap(), - nullable: true, - }); - } - } } addr @@ -830,54 +623,12 @@ fn compute_addr( addr_ty: ir::Type, index: ir::Value, offset: u32, - pcc: Option, ) -> ir::Value { debug_assert_eq!(pos.func.dfg.value_type(index), addr_ty); let heap_base = pos.ins().global_value(addr_ty, heap.base); - - match pcc { - None => {} - Some(AddrPcc::Static32(ty, _size)) => { - pos.func.dfg.facts[heap_base] = Some(Fact::Mem { - ty, - min_offset: 0, - max_offset: 0, - nullable: false, - }); - } - Some(AddrPcc::Dynamic(ty, _limit)) => { - pos.func.dfg.facts[heap_base] = Some(Fact::dynamic_base_ptr(ty)); - } - } - let base_and_index = pos.ins().iadd(heap_base, index); - match pcc { - None => {} - Some(AddrPcc::Static32(ty, _) | AddrPcc::Dynamic(ty, _)) => { - if let Some(idx) = pos.func.dfg.facts[index] - .as_ref() - .and_then(|f| f.as_symbol()) - .cloned() - { - pos.func.dfg.facts[base_and_index] = Some(Fact::DynamicMem { - ty, - min: idx.clone(), - max: idx, - nullable: false, - }); - } else { - pos.func.dfg.facts[base_and_index] = Some(Fact::Mem { - ty, - min_offset: 0, - max_offset: u64::from(u32::MAX), - nullable: false, - }); - } - } - } - if offset == 0 { base_and_index } else { @@ -886,47 +637,7 @@ fn compute_addr( // potentially are letting speculative execution read the whole first // 4GiB of memory. let offset_val = pos.ins().iconst(addr_ty, i64::from(offset)); - - if pcc.is_some() { - pos.func.dfg.facts[offset_val] = Some(Fact::constant( - u16::try_from(addr_ty.bits()).unwrap(), - u64::from(offset), - )); - } - - let result = pos.ins().iadd(base_and_index, offset_val); - - match pcc { - None => {} - Some(AddrPcc::Static32(ty, _) | AddrPcc::Dynamic(ty, _)) => { - if let Some(idx) = pos.func.dfg.facts[index] - .as_ref() - .and_then(|f| f.as_symbol()) - { - pos.func.dfg.facts[result] = Some(Fact::DynamicMem { - ty, - min: idx.clone(), - // Safety: adding an offset to an expression with - // zero offset -- add cannot wrap, so `unwrap()` - // cannot fail. - max: Expr::offset(idx, i64::from(offset)).unwrap(), - nullable: false, - }); - } else { - pos.func.dfg.facts[result] = Some(Fact::Mem { - ty, - min_offset: u64::from(offset), - // Safety: can't overflow -- two u32s summed in a - // 64-bit add. TODO: when memory64 is supported here, - // `u32::MAX` is no longer true, and we'll need to - // handle overflow here. - max_offset: u64::from(u32::MAX) + u64::from(offset), - nullable: false, - }); - } - } - } - result + pos.ins().iadd(base_and_index, offset_val) } } diff --git a/crates/cranelift/src/func_environ.rs b/crates/cranelift/src/func_environ.rs index 5eccf9732d58..2b1233405bf4 100644 --- a/crates/cranelift/src/func_environ.rs +++ b/crates/cranelift/src/func_environ.rs @@ -11,7 +11,6 @@ use crate::trap::TranslateTrap; use cranelift_codegen::cursor::FuncCursor; use cranelift_codegen::ir::condcodes::{FloatCC, IntCC}; use cranelift_codegen::ir::immediates::{Imm64, Offset32, V128Imm}; -use cranelift_codegen::ir::pcc::Fact; use cranelift_codegen::ir::{ self, BlockArg, Endianness, ExceptionTableData, ExceptionTableItem, types, }; @@ -168,10 +167,6 @@ pub struct FuncEnvironment<'module_environment> { /// The Cranelift global for our vmctx's `*mut VMStoreContext`. vm_store_context: Option, - /// The PCC memory type describing the vmctx layout, if we're - /// using PCC. - pcc_vmctx_memtype: Option, - /// Caches of signatures for builtin functions. builtin_functions: BuiltinFunctions, @@ -270,7 +265,6 @@ impl<'module_environment> FuncEnvironment<'module_environment> { heaps: PrimaryMap::default(), vmctx: None, vm_store_context: None, - pcc_vmctx_memtype: None, builtin_functions, offsets: VMOffsets::new(compiler.isa().pointer_bytes(), &translation.module), tunables, @@ -301,24 +295,6 @@ impl<'module_environment> FuncEnvironment<'module_environment> { pub(crate) fn vmctx(&mut self, func: &mut Function) -> ir::GlobalValue { self.vmctx.unwrap_or_else(|| { let vmctx = func.create_global_value(ir::GlobalValueData::VMContext); - if self.isa.flags().enable_pcc() { - // Create a placeholder memtype for the vmctx; we'll - // add fields to it as we lazily create HeapData - // structs and global values. - let vmctx_memtype = func.create_memory_type(ir::MemoryTypeData::Struct { - size: 0, - fields: vec![], - }); - - self.pcc_vmctx_memtype = Some(vmctx_memtype); - func.global_value_facts[vmctx] = Some(Fact::Mem { - ty: vmctx_memtype, - min_offset: 0, - max_offset: 0, - nullable: false, - }); - } - self.vmctx = Some(vmctx); vmctx }) @@ -947,97 +923,32 @@ impl<'module_environment> FuncEnvironment<'module_environment> { .copied() } - /// Proof-carrying code: create a memtype describing an empty - /// runtime struct (to be updated later). - fn create_empty_struct_memtype(&self, func: &mut ir::Function) -> ir::MemoryType { - func.create_memory_type(ir::MemoryTypeData::Struct { - size: 0, - fields: vec![], - }) - } - - /// Proof-carrying code: add a new field to a memtype used to - /// describe a runtime struct. A memory region of type `memtype` - /// will have a pointer at `offset` pointing to another memory - /// region of type `pointee`. `readonly` indicates whether the - /// PCC-checked code is expected to update this field or not. - fn add_field_to_memtype( - &self, - func: &mut ir::Function, - memtype: ir::MemoryType, - offset: u32, - pointee: ir::MemoryType, - readonly: bool, - ) { - let ptr_size = self.pointer_type().bytes(); - match &mut func.memory_types[memtype] { - ir::MemoryTypeData::Struct { size, fields } => { - *size = std::cmp::max(*size, offset.checked_add(ptr_size).unwrap().into()); - fields.push(ir::MemoryTypeField { - ty: self.pointer_type(), - offset: offset.into(), - readonly, - fact: Some(ir::Fact::Mem { - ty: pointee, - min_offset: 0, - max_offset: 0, - nullable: false, - }), - }); - - // Sort fields by offset -- we need to do this now - // because we may create an arbitrary number of - // memtypes for imported memories and we don't - // otherwise track them. - fields.sort_by_key(|f| f.offset); - } - _ => panic!("Cannot add field to non-struct memtype"), - } - } - - /// Create an `ir::Global` that does `load(ptr + offset)` and, when PCC and - /// memory types are enabled, adds a field to the pointer's memory type for - /// this value we are loading. - pub(crate) fn global_load_with_memory_type( + /// Create an `ir::Global` that does `load(ptr + offset)`. + pub(crate) fn global_load( &mut self, func: &mut ir::Function, ptr: ir::GlobalValue, offset: u32, flags: ir::MemFlags, - ptr_mem_ty: Option, - ) -> (ir::GlobalValue, Option) { - let pointee = func.create_global_value(ir::GlobalValueData::Load { + ) -> ir::GlobalValue { + func.create_global_value(ir::GlobalValueData::Load { base: ptr, offset: Offset32::new(i32::try_from(offset).unwrap()), global_type: self.pointer_type(), flags, - }); - - let pointee_mem_ty = ptr_mem_ty.map(|ptr_mem_ty| { - let pointee_mem_ty = self.create_empty_struct_memtype(func); - self.add_field_to_memtype(func, ptr_mem_ty, offset, pointee_mem_ty, flags.readonly()); - func.global_value_facts[pointee] = Some(Fact::Mem { - ty: pointee_mem_ty, - min_offset: 0, - max_offset: 0, - nullable: false, - }); - pointee_mem_ty - }); - - (pointee, pointee_mem_ty) + }) } - /// Like `global_load_with_memory_type` but specialized for loads out of the + /// Like `global_load` but specialized for loads out of the /// `vmctx`. - pub(crate) fn global_load_from_vmctx_with_memory_type( + pub(crate) fn global_load_from_vmctx( &mut self, func: &mut ir::Function, offset: u32, flags: ir::MemFlags, - ) -> (ir::GlobalValue, Option) { + ) -> ir::GlobalValue { let vmctx = self.vmctx(func); - self.global_load_with_memory_type(func, vmctx, offset, flags, self.pcc_vmctx_memtype) + self.global_load(func, vmctx, offset, flags) } /// Helper used when `!self.clif_instruction_traps_enabled()` is enabled to @@ -1571,7 +1482,7 @@ impl FuncEnvironment<'_> { let memory = self.module.memories[index]; let is_shared = memory.shared; - let (base_ptr, base_offset, current_length_offset, ptr_memtype) = { + let (base_ptr, base_offset, current_length_offset) = { let vmctx = self.vmctx(func); if let Some(def_index) = self.module.defined_memory_index(index) { if is_shared { @@ -1580,7 +1491,7 @@ impl FuncEnvironment<'_> { // VMMemoryDefinition` to it and dereference that when // atomically growing it. let from_offset = self.offsets.vmctx_vmmemory_pointer(def_index); - let (memory, def_mt) = self.global_load_from_vmctx_with_memory_type( + let memory = self.global_load_from_vmctx( func, from_offset, ir::MemFlags::trusted().with_readonly().with_can_move(), @@ -1588,7 +1499,7 @@ impl FuncEnvironment<'_> { let base_offset = i32::from(self.offsets.ptr.vmmemory_definition_base()); let current_length_offset = i32::from(self.offsets.ptr.vmmemory_definition_current_length()); - (memory, base_offset, current_length_offset, def_mt) + (memory, base_offset, current_length_offset) } else { let owned_index = self.module.owned_memory_index(def_index); let owned_base_offset = @@ -1598,16 +1509,11 @@ impl FuncEnvironment<'_> { .vmctx_vmmemory_definition_current_length(owned_index); let current_base_offset = i32::try_from(owned_base_offset).unwrap(); let current_length_offset = i32::try_from(owned_length_offset).unwrap(); - ( - vmctx, - current_base_offset, - current_length_offset, - self.pcc_vmctx_memtype, - ) + (vmctx, current_base_offset, current_length_offset) } } else { let from_offset = self.offsets.vmctx_vmmemory_import_from(index); - let (memory, def_mt) = self.global_load_from_vmctx_with_memory_type( + let memory = self.global_load_from_vmctx( func, from_offset, ir::MemFlags::trusted().with_readonly().with_can_move(), @@ -1615,7 +1521,7 @@ impl FuncEnvironment<'_> { let base_offset = i32::from(self.offsets.ptr.vmmemory_definition_base()); let current_length_offset = i32::from(self.offsets.ptr.vmmemory_definition_current_length()); - (memory, base_offset, current_length_offset, def_mt) + (memory, base_offset, current_length_offset) } }; @@ -1626,21 +1532,11 @@ impl FuncEnvironment<'_> { flags: MemFlags::trusted(), }); - let (base_fact, pcc_memory_type) = self.make_pcc_base_fact_and_type_for_memory( - func, - memory, - base_offset, - current_length_offset, - ptr_memtype, - bound, - ); - - let base = self.make_heap_base(func, memory, base_ptr, base_offset, base_fact); + let base = self.make_heap_base(func, memory, base_ptr, base_offset); self.heaps.push(HeapData { base, bound, - pcc_memory_type, memory, }) } @@ -1651,11 +1547,10 @@ impl FuncEnvironment<'_> { memory: Memory, ptr: ir::GlobalValue, offset: i32, - fact: Option, ) -> ir::GlobalValue { let pointer_type = self.pointer_type(); - let mut flags = ir::MemFlags::trusted().with_checked().with_can_move(); + let mut flags = ir::MemFlags::trusted().with_can_move(); if !memory.memory_may_move(self.tunables) { flags.set_readonly(); } @@ -1666,128 +1561,9 @@ impl FuncEnvironment<'_> { global_type: pointer_type, flags, }); - func.global_value_facts[heap_base] = fact; heap_base } - pub(crate) fn make_pcc_base_fact_and_type_for_memory( - &mut self, - func: &mut Function, - memory: Memory, - base_offset: i32, - current_length_offset: i32, - ptr_memtype: Option, - heap_bound: ir::GlobalValue, - ) -> (Option, Option) { - // If we have a declared maximum, we can make this a "static" heap, which is - // allocated up front and never moved. - let host_page_size_log2 = self.target_config().page_size_align_log2; - let (base_fact, memory_type) = if !memory - .can_elide_bounds_check(self.tunables, host_page_size_log2) - { - if let Some(ptr_memtype) = ptr_memtype { - // Create a memtype representing the untyped memory region. - let data_mt = func.create_memory_type(ir::MemoryTypeData::DynamicMemory { - gv: heap_bound, - size: self.tunables.memory_guard_size, - }); - // This fact applies to any pointer to the start of the memory. - let base_fact = ir::Fact::dynamic_base_ptr(data_mt); - // This fact applies to the length. - let length_fact = ir::Fact::global_value( - u16::try_from(self.isa.pointer_type().bits()).unwrap(), - heap_bound, - ); - // Create a field in the vmctx for the base pointer. - match &mut func.memory_types[ptr_memtype] { - ir::MemoryTypeData::Struct { size, fields } => { - let base_offset = u64::try_from(base_offset).unwrap(); - fields.push(ir::MemoryTypeField { - offset: base_offset, - ty: self.isa.pointer_type(), - // Read-only field from the PoV of PCC checks: - // don't allow stores to this field. (Even if - // it is a dynamic memory whose base can - // change, that update happens inside the - // runtime, not in generated code.) - readonly: true, - fact: Some(base_fact.clone()), - }); - let current_length_offset = u64::try_from(current_length_offset).unwrap(); - fields.push(ir::MemoryTypeField { - offset: current_length_offset, - ty: self.isa.pointer_type(), - // As above, read-only; only the runtime modifies it. - readonly: true, - fact: Some(length_fact), - }); - - let pointer_size = u64::from(self.isa.pointer_type().bytes()); - let fields_end = std::cmp::max( - base_offset + pointer_size, - current_length_offset + pointer_size, - ); - *size = std::cmp::max(*size, fields_end); - } - _ => { - panic!("Bad memtype"); - } - } - // Apply a fact to the base pointer. - (Some(base_fact), Some(data_mt)) - } else { - (None, None) - } - } else { - if let Some(ptr_memtype) = ptr_memtype { - // Create a memtype representing the untyped memory region. - let data_mt = func.create_memory_type(ir::MemoryTypeData::Memory { - size: self - .tunables - .memory_reservation - .checked_add(self.tunables.memory_guard_size) - .expect("Memory plan has overflowing size plus guard"), - }); - // This fact applies to any pointer to the start of the memory. - let base_fact = Fact::Mem { - ty: data_mt, - min_offset: 0, - max_offset: 0, - nullable: false, - }; - // Create a field in the vmctx for the base pointer. - match &mut func.memory_types[ptr_memtype] { - ir::MemoryTypeData::Struct { size, fields } => { - let offset = u64::try_from(base_offset).unwrap(); - fields.push(ir::MemoryTypeField { - offset, - ty: self.isa.pointer_type(), - // Read-only field from the PoV of PCC checks: - // don't allow stores to this field. (Even if - // it is a dynamic memory whose base can - // change, that update happens inside the - // runtime, not in generated code.) - readonly: true, - fact: Some(base_fact.clone()), - }); - *size = std::cmp::max( - *size, - offset + u64::from(self.isa.pointer_type().bytes()), - ); - } - _ => { - panic!("Bad memtype"); - } - } - // Apply a fact to the base pointer. - (Some(base_fact), Some(data_mt)) - } else { - (None, None) - } - }; - (base_fact, memory_type) - } - fn make_table(&mut self, func: &mut ir::Function, index: TableIndex) -> TableData { let pointer_type = self.pointer_type(); @@ -2562,10 +2338,6 @@ impl<'module_environment> TargetEnvironment for FuncEnvironment<'module_environm self.isa.flags().enable_heap_access_spectre_mitigation() } - fn proof_carrying_code(&self) -> bool { - self.isa.flags().enable_pcc() - } - fn tunables(&self) -> &Tunables { self.compiler.tunables() } diff --git a/crates/cranelift/src/func_environ/gc/enabled.rs b/crates/cranelift/src/func_environ/gc/enabled.rs index 06b44b513281..d95109dfe636 100644 --- a/crates/cranelift/src/func_environ/gc/enabled.rs +++ b/crates/cranelift/src/func_environ/gc/enabled.rs @@ -1456,7 +1456,6 @@ impl FuncEnvironment<'_> { let heap = self.heaps.push(HeapData { base, bound, - pcc_memory_type: None, memory, }); self.gc_heap = Some(heap); diff --git a/crates/cranelift/src/translate/code_translator.rs b/crates/cranelift/src/translate/code_translator.rs index 4648647ef98c..3d2b34d6410b 100644 --- a/crates/cranelift/src/translate/code_translator.rs +++ b/crates/cranelift/src/translate/code_translator.rs @@ -3620,11 +3620,6 @@ fn prepare_addr( let mut flags = MemFlags::new(); flags.set_endianness(ir::Endianness::Little); - if heap.pcc_memory_type.is_some() { - // Proof-carrying code is enabled; check this memory access. - flags.set_checked(); - } - // The access occurs to the `heap` disjoint category of abstract // state. This may allow alias analysis to merge redundant loads, // etc. when heap accesses occur interleaved with other (table, diff --git a/crates/cranelift/src/translate/environ/spec.rs b/crates/cranelift/src/translate/environ/spec.rs index 68806c1524fd..bad8dc1d8a65 100644 --- a/crates/cranelift/src/translate/environ/spec.rs +++ b/crates/cranelift/src/translate/environ/spec.rs @@ -43,9 +43,6 @@ pub trait TargetEnvironment: TypeConvert { /// Whether to enable Spectre mitigations for heap accesses. fn heap_access_spectre_mitigation(&self) -> bool; - /// Whether to add proof-carrying-code facts to verify memory accesses. - fn proof_carrying_code(&self) -> bool; - /// Get the Cranelift reference type to use for the given Wasm reference /// type. /// diff --git a/crates/cranelift/src/translate/heap.rs b/crates/cranelift/src/translate/heap.rs index cdedff9d2dd3..32992dd19171 100644 --- a/crates/cranelift/src/translate/heap.rs +++ b/crates/cranelift/src/translate/heap.rs @@ -1,6 +1,6 @@ //! Heaps to implement WebAssembly linear memories. -use cranelift_codegen::ir::{self, GlobalValue, MemoryType, Type}; +use cranelift_codegen::ir::{self, GlobalValue, Type}; use cranelift_entity::entity_impl; use wasmtime_environ::{IndexType, Memory}; @@ -45,9 +45,6 @@ pub struct HeapData { /// The type of wasm memory that this heap is operating on. pub memory: Memory, - - /// The memory type for the pointed-to memory, if using proof-carrying code. - pub pcc_memory_type: Option, } impl HeapData { diff --git a/crates/fuzzing/Cargo.toml b/crates/fuzzing/Cargo.toml index 240985681687..1c9c55138b18 100644 --- a/crates/fuzzing/Cargo.toml +++ b/crates/fuzzing/Cargo.toml @@ -82,6 +82,3 @@ wasm-spec-interpreter = { path = "./wasm-spec-interpreter", optional = true, fea [features] fuzz-spec-interpreter = ['dep:wasm-spec-interpreter'] - -# Fuzz proof-carrying code. Off by default. -fuzz-pcc = [] diff --git a/crates/fuzzing/src/generators/config.rs b/crates/fuzzing/src/generators/config.rs index 1b442e46c7cb..092eae444817 100644 --- a/crates/fuzzing/src/generators/config.rs +++ b/crates/fuzzing/src/generators/config.rs @@ -331,13 +331,6 @@ impl Config { self.wasmtime.codegen.configure(&mut cfg); - // Determine whether we will actually enable PCC -- this is - // disabled if the module requires memory64, which is not yet - // compatible (due to the need for dynamic checks). - let pcc = cfg!(feature = "fuzz-pcc") - && self.wasmtime.pcc - && !self.module_config.config.memory64_enabled; - cfg.codegen.inlining = self.wasmtime.inlining; // Only set cranelift specific flags when the Cranelift strategy is @@ -392,8 +385,6 @@ impl Config { )); } - cfg.codegen.pcc = Some(pcc); - // Eager init is currently only supported on Cranelift, not Winch. cfg.opts.table_lazy_init = Some(self.wasmtime.table_lazy_init); } @@ -411,22 +402,7 @@ impl Config { // `CustomUnaligned` variant isn't actually safe to use with a shared // memory. if !self.module_config.config.threads_enabled { - // If PCC is enabled, force other options to be compatible: PCC is currently only - // supported when bounds checks are elided. - let memory_config = if pcc { - MemoryConfig { - memory_reservation: Some(4 << 30), // 4 GiB - memory_guard_size: Some(2 << 30), // 2 GiB - memory_reservation_for_growth: Some(0), - guard_before_linear_memory: false, - memory_init_cow: true, - // Doesn't matter, only using virtual memory. - cranelift_enable_heap_access_spectre_mitigations: None, - } - } else { - self.wasmtime.memory_config.clone() - }; - + let memory_config = self.wasmtime.memory_config.clone(); memory_config.configure(&mut cfg); }; @@ -620,9 +596,6 @@ pub struct WasmtimeConfig { collector: Collector, table_lazy_init: bool, - /// Whether or not fuzzing should enable PCC. - pcc: bool, - /// Configuration for whether wasm is invoked in an async fashion and how /// it's cooperatively time-sliced. pub async_config: AsyncConfig, diff --git a/crates/fuzzing/src/oracles.rs b/crates/fuzzing/src/oracles.rs index 9b89849c07b2..dc02b7e6b75e 100644 --- a/crates/fuzzing/src/oracles.rs +++ b/crates/fuzzing/src/oracles.rs @@ -324,17 +324,8 @@ fn compile_module( ) -> Option { log_wasm(bytes); - fn is_pcc_error(e: &wasmtime::Error) -> bool { - // NOTE: please keep this predicate in sync with the display format of CodegenError, - // defined in `wasmtime/cranelift/codegen/src/result.rs` - e.to_string().to_lowercase().contains("proof-carrying-code") - } - match config.compile(engine, bytes) { Ok(module) => Some(module), - Err(e) if is_pcc_error(&e) => { - panic!("pcc error in input: {e:#?}"); - } Err(_) if known_valid == KnownValid::No => None, Err(e) => { if let generators::InstanceAllocationStrategy::Pooling(c) = &config.wasmtime.strategy { diff --git a/crates/fuzzing/src/oracles/memory.rs b/crates/fuzzing/src/oracles/memory.rs index d6ed4806d677..9f01dc2e102b 100644 --- a/crates/fuzzing/src/oracles/memory.rs +++ b/crates/fuzzing/src/oracles/memory.rs @@ -31,9 +31,6 @@ pub fn check_memory_accesses(input: MemoryAccesses) { Err(e) => { let e = format!("{e:?}"); log::info!("Failed to create `Module`: {e}"); - if cfg!(feature = "fuzz-pcc") && e.contains("Compilation error: Proof-carrying-code") { - return; - } assert!( e.contains("bytes which exceeds the configured maximum of") || e.contains("exceeds the limit of"), diff --git a/crates/wasmtime/src/config.rs b/crates/wasmtime/src/config.rs index 1e0857010c3e..790fcb4ae768 100644 --- a/crates/wasmtime/src/config.rs +++ b/crates/wasmtime/src/config.rs @@ -1465,32 +1465,6 @@ impl Config { self } - /// Controls whether proof-carrying code (PCC) is used to validate - /// lowering of Wasm sandbox checks. - /// - /// Proof-carrying code carries "facts" about program values from - /// the IR all the way to machine code, and checks those facts - /// against known machine-instruction semantics. This guards - /// against bugs in instruction lowering that might create holes - /// in the Wasm sandbox. - /// - /// PCC is designed to be fast: it does not require complex - /// solvers or logic engines to verify, but only a linear pass - /// over a trail of "breadcrumbs" or facts at each intermediate - /// value. Thus, it is appropriate to enable in production. - /// - /// # Panics - /// - /// Panics if this configuration's compiler was [disabled][Config::enable_compiler]. - #[cfg(any(feature = "cranelift", feature = "winch"))] - pub fn cranelift_pcc(&mut self, enable: bool) -> &mut Self { - let val = if enable { "true" } else { "false" }; - self.compiler_config_mut() - .settings - .insert("enable_pcc".to_string(), val.to_string()); - self - } - /// Allows setting a Cranelift boolean flag or preset. This allows /// fine-tuning of Cranelift settings. /// diff --git a/crates/wasmtime/src/engine.rs b/crates/wasmtime/src/engine.rs index f0f729c62e30..cb6834169513 100644 --- a/crates/wasmtime/src/engine.rs +++ b/crates/wasmtime/src/engine.rs @@ -489,7 +489,6 @@ information about this check\ | "enable_nan_canonicalization" | "enable_float" | "enable_verifier" - | "enable_pcc" | "regalloc_checker" | "regalloc_verbose_logs" | "regalloc_algorithm" diff --git a/tests/disas/basic-wat-test.wat b/tests/disas/basic-wat-test.wat index d61b3f66a6f0..6c87259fd721 100644 --- a/tests/disas/basic-wat-test.wat +++ b/tests/disas/basic-wat-test.wat @@ -15,16 +15,16 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0021 v5 = uextend.i64 v2 -;; @0021 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0021 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0021 v7 = iadd v6, v5 ;; @0021 v8 = load.i32 little heap v7 ;; @0026 v9 = uextend.i64 v3 -;; @0026 v10 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0026 v10 = load.i64 notrap aligned readonly can_move v0+56 ;; @0026 v11 = iadd v10, v9 ;; @0026 v12 = load.i32 little heap v11 ;; @0029 v13 = iadd v8, v12 diff --git a/tests/disas/bounds-check.wat b/tests/disas/bounds-check.wat index 6405f57f26dc..e2b6df9ad78d 100644 --- a/tests/disas/bounds-check.wat +++ b/tests/disas/bounds-check.wat @@ -30,12 +30,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @002a v3 = iconst.i32 0 -;; @002c v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002c v4 = uextend.i64 v2 ;; @002c v6 = iadd v5, v4 ;; @002c istore8 little heap v3, v6 ; v3 = 0 diff --git a/tests/disas/duplicate-loads-dynamic-memory.wat b/tests/disas/duplicate-loads-dynamic-memory.wat index b4ee0b4c7d49..a886458b8cd0 100644 --- a/tests/disas/duplicate-loads-dynamic-memory.wat +++ b/tests/disas/duplicate-loads-dynamic-memory.wat @@ -28,12 +28,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0057 v6 = load.i64 notrap aligned v0+64 -;; @0057 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0057 v8 = load.i64 notrap aligned can_move v0+56 ;; @0057 v5 = uextend.i64 v2 ;; @0057 v7 = icmp ugt v5, v6 ;; @0057 v10 = iconst.i64 0 @@ -52,12 +52,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0064 v6 = load.i64 notrap aligned v0+64 -;; @0064 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0064 v8 = load.i64 notrap aligned can_move v0+56 ;; @0064 v5 = uextend.i64 v2 ;; @0064 v7 = icmp ugt v5, v6 ;; @0064 v12 = iconst.i64 0 diff --git a/tests/disas/duplicate-loads-static-memory.wat b/tests/disas/duplicate-loads-static-memory.wat index 063f8a98dcde..1933d2f45eaf 100644 --- a/tests/disas/duplicate-loads-static-memory.wat +++ b/tests/disas/duplicate-loads-static-memory.wat @@ -23,11 +23,11 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): -;; @0057 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0057 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0057 v5 = uextend.i64 v2 ;; @0057 v7 = iadd v6, v5 ;; @0057 v8 = load.i32 little heap v7 @@ -43,11 +43,11 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): -;; @0064 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0064 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0064 v5 = uextend.i64 v2 ;; @0064 v7 = iadd v6, v5 ;; @0064 v8 = iconst.i64 1234 diff --git a/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat b/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat index 3eade3d3ef62..52b5db8c4940 100644 --- a/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat +++ b/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat @@ -41,7 +41,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -49,7 +49,7 @@ ;; @0047 v6 = uextend.i64 v2 ;; @0047 v8 = icmp ugt v6, v7 ;; @0047 trapnz v8, heap_oob -;; @0047 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0047 v9 = load.i64 notrap aligned can_move v0+56 ;; @0047 v10 = iadd v9, v6 ;; @0047 v11 = load.i32 little heap v10 ;; @004c v17 = iconst.i64 4 @@ -74,7 +74,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32): @@ -82,7 +82,7 @@ ;; @005d v6 = uextend.i64 v2 ;; @005d v8 = icmp ugt v6, v7 ;; @005d trapnz v8, heap_oob -;; @005d v9 = load.i64 notrap aligned can_move checked v0+56 +;; @005d v9 = load.i64 notrap aligned can_move v0+56 ;; @005d v10 = iadd v9, v6 ;; @005d store little heap v3, v10 ;; @0064 v16 = iconst.i64 4 diff --git a/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat b/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat index 8e673587a7ff..be1d1aefb049 100644 --- a/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat +++ b/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat @@ -37,12 +37,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0047 v7 = load.i64 notrap aligned v0+64 -;; @0047 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0047 v9 = load.i64 notrap aligned can_move v0+56 ;; @0047 v6 = uextend.i64 v2 ;; @0047 v8 = icmp ugt v6, v7 ;; @0047 v11 = iconst.i64 0 @@ -72,12 +72,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32): ;; @005d v7 = load.i64 notrap aligned v0+64 -;; @005d v9 = load.i64 notrap aligned can_move checked v0+56 +;; @005d v9 = load.i64 notrap aligned can_move v0+56 ;; @005d v6 = uextend.i64 v2 ;; @005d v8 = icmp ugt v6, v7 ;; @005d v11 = iconst.i64 0 diff --git a/tests/disas/f32-load.wat b/tests/disas/f32-load.wat index 6f96bdd69a78..3ed84126a073 100644 --- a/tests/disas/f32-load.wat +++ b/tests/disas/f32-load.wat @@ -12,12 +12,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @002e v4 = uextend.i64 v2 -;; @002e v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 ;; @002e v7 = load.f32 little heap v6 ;; @0031 jump block1 diff --git a/tests/disas/f32-store.wat b/tests/disas/f32-store.wat index f3b643350235..858b3fc30956 100644 --- a/tests/disas/f32-store.wat +++ b/tests/disas/f32-store.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: f32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 store little heap v3, v6 ;; @0034 jump block1 diff --git a/tests/disas/f64-load.wat b/tests/disas/f64-load.wat index 0992356689d1..e0930d0663a1 100644 --- a/tests/disas/f64-load.wat +++ b/tests/disas/f64-load.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @002e v4 = uextend.i64 v2 -;; @002e v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 ;; @002e v7 = load.f64 little heap v6 ;; @0031 jump block1 diff --git a/tests/disas/f64-store.wat b/tests/disas/f64-store.wat index 4caf5489ef27..682dea575b50 100644 --- a/tests/disas/f64-store.wat +++ b/tests/disas/f64-store.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: f64): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 store little heap v3, v6 ;; @0034 jump block1 diff --git a/tests/disas/fibonacci.wat b/tests/disas/fibonacci.wat index 78c3214ff63a..04ae1e33b1de 100644 --- a/tests/disas/fibonacci.wat +++ b/tests/disas/fibonacci.wat @@ -29,7 +29,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): @@ -55,7 +55,7 @@ ;; block2: ;; @0056 v16 = iconst.i32 0 ;; @005a v17 = uextend.i64 v16 ; v16 = 0 -;; @005a v18 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @005a v18 = load.i64 notrap aligned readonly can_move v0+56 ;; @005a v19 = iadd v18, v17 ;; @005a store.i32 little heap v11, v19 ;; @005d jump block1 diff --git a/tests/disas/fixed-size-memory.wat b/tests/disas/fixed-size-memory.wat index 4dc7cac8c45c..c437231b5016 100644 --- a/tests/disas/fixed-size-memory.wat +++ b/tests/disas/fixed-size-memory.wat @@ -26,7 +26,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0041 v5 = iconst.i64 0x0001_0000 ;; @0041 v6 = icmp uge v4, v5 ; v5 = 0x0001_0000 ;; @0041 trapnz v6, heap_oob -;; @0041 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0041 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0041 v8 = iadd v7, v4 ;; @0041 istore8 little heap v3, v8 ;; @0044 jump block1 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = iconst.i64 0x0001_0000 ;; @0049 v6 = icmp uge v4, v5 ; v5 = 0x0001_0000 ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = uload8.i32 little heap v8 ;; @004c jump block1 diff --git a/tests/disas/globals.wat b/tests/disas/globals.wat index 447e0d409a59..003c8f51b2bb 100644 --- a/tests/disas/globals.wat +++ b/tests/disas/globals.wat @@ -15,7 +15,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): @@ -23,7 +23,7 @@ ;; @0029 v3 = iconst.i32 0 ;; @002b v5 = load.i32 notrap aligned table v0+80 ;; @002d v6 = uextend.i64 v3 ; v3 = 0 -;; @002d v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002d v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @002d v8 = iadd v7, v6 ;; @002d store little heap v5, v8 ;; @0030 jump block1 diff --git a/tests/disas/i32-load.wat b/tests/disas/i32-load.wat index 38aa47760553..77a404f5be15 100644 --- a/tests/disas/i32-load.wat +++ b/tests/disas/i32-load.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @002e v4 = uextend.i64 v2 -;; @002e v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 ;; @002e v7 = load.i32 little heap v6 ;; @0031 jump block1 diff --git a/tests/disas/i32-load16-s.wat b/tests/disas/i32-load16-s.wat index f25f29e259f4..9a5eee03bcbc 100644 --- a/tests/disas/i32-load16-s.wat +++ b/tests/disas/i32-load16-s.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 v7 = sload16.i32 little heap v6 ;; @0035 jump block1 diff --git a/tests/disas/i32-load16-u.wat b/tests/disas/i32-load16-u.wat index 740bd34d9178..6f715dd41471 100644 --- a/tests/disas/i32-load16-u.wat +++ b/tests/disas/i32-load16-u.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 v7 = uload16.i32 little heap v6 ;; @0035 jump block1 diff --git a/tests/disas/i32-load8-s.wat b/tests/disas/i32-load8-s.wat index a6430c10d7eb..3d62165bf76e 100644 --- a/tests/disas/i32-load8-s.wat +++ b/tests/disas/i32-load8-s.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 v7 = sload8.i32 little heap v6 ;; @0034 jump block1 diff --git a/tests/disas/i32-load8-u.wat b/tests/disas/i32-load8-u.wat index 959250f53379..67548ca5090c 100644 --- a/tests/disas/i32-load8-u.wat +++ b/tests/disas/i32-load8-u.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 v7 = uload8.i32 little heap v6 ;; @0034 jump block1 diff --git a/tests/disas/i32-store.wat b/tests/disas/i32-store.wat index dcb8f1b736d0..bb44dfc2bf70 100644 --- a/tests/disas/i32-store.wat +++ b/tests/disas/i32-store.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 store little heap v3, v6 ;; @0034 jump block1 diff --git a/tests/disas/i32-store16.wat b/tests/disas/i32-store16.wat index 8de09bffac0a..20db521ac12c 100644 --- a/tests/disas/i32-store16.wat +++ b/tests/disas/i32-store16.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0033 v4 = uextend.i64 v2 -;; @0033 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 ;; @0033 istore16 little heap v3, v6 ;; @0036 jump block1 diff --git a/tests/disas/i32-store8.wat b/tests/disas/i32-store8.wat index 4bbe0f2bc80f..0bd3c4dd182c 100644 --- a/tests/disas/i32-store8.wat +++ b/tests/disas/i32-store8.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 istore8 little heap v3, v6 ;; @0035 jump block1 diff --git a/tests/disas/i64-load.wat b/tests/disas/i64-load.wat index 564ec9a2b780..d392e76b1521 100644 --- a/tests/disas/i64-load.wat +++ b/tests/disas/i64-load.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @002e v4 = uextend.i64 v2 -;; @002e v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 ;; @002e v7 = load.i64 little heap v6 ;; @0031 jump block1 diff --git a/tests/disas/i64-load16-s.wat b/tests/disas/i64-load16-s.wat index f62bcdee2fcb..928209697308 100644 --- a/tests/disas/i64-load16-s.wat +++ b/tests/disas/i64-load16-s.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 v7 = sload16.i64 little heap v6 ;; @0035 jump block1 diff --git a/tests/disas/i64-load16-u.wat b/tests/disas/i64-load16-u.wat index 15565385dcdc..359663affd82 100644 --- a/tests/disas/i64-load16-u.wat +++ b/tests/disas/i64-load16-u.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 v7 = uload16.i64 little heap v6 ;; @0035 jump block1 diff --git a/tests/disas/i64-load8-s.wat b/tests/disas/i64-load8-s.wat index 4258fb7f58b2..8e8f0f402e40 100644 --- a/tests/disas/i64-load8-s.wat +++ b/tests/disas/i64-load8-s.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 v7 = sload8.i64 little heap v6 ;; @0034 jump block1 diff --git a/tests/disas/i64-load8-u.wat b/tests/disas/i64-load8-u.wat index 3aa49760f826..05293f228035 100644 --- a/tests/disas/i64-load8-u.wat +++ b/tests/disas/i64-load8-u.wat @@ -14,12 +14,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 v7 = uload8.i64 little heap v6 ;; @0034 jump block1 diff --git a/tests/disas/i64-store.wat b/tests/disas/i64-store.wat index a55b9b33d0f2..d001e38e191a 100644 --- a/tests/disas/i64-store.wat +++ b/tests/disas/i64-store.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i64): ;; @0031 v4 = uextend.i64 v2 -;; @0031 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 ;; @0031 store little heap v3, v6 ;; @0034 jump block1 diff --git a/tests/disas/i64-store16.wat b/tests/disas/i64-store16.wat index fba65aed7de6..cb6b8aca0e0d 100644 --- a/tests/disas/i64-store16.wat +++ b/tests/disas/i64-store16.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i64): ;; @0033 v4 = uextend.i64 v2 -;; @0033 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 ;; @0033 istore16 little heap v3, v6 ;; @0036 jump block1 diff --git a/tests/disas/i64-store32.wat b/tests/disas/i64-store32.wat index ac5f28cbfd91..749aabbacaa0 100644 --- a/tests/disas/i64-store32.wat +++ b/tests/disas/i64-store32.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i64): ;; @0033 v4 = uextend.i64 v2 -;; @0033 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 ;; @0033 istore32 little heap v3, v6 ;; @0036 jump block1 diff --git a/tests/disas/i64-store8.wat b/tests/disas/i64-store8.wat index 756086216b9e..9e263ae74804 100644 --- a/tests/disas/i64-store8.wat +++ b/tests/disas/i64-store8.wat @@ -15,12 +15,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i64): ;; @0032 v4 = uextend.i64 v2 -;; @0032 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 ;; @0032 istore8 little heap v3, v6 ;; @0035 jump block1 diff --git a/tests/disas/if-unreachable-else-params-2.wat b/tests/disas/if-unreachable-else-params-2.wat index 9ea6e9468b03..407a59765c99 100644 --- a/tests/disas/if-unreachable-else-params-2.wat +++ b/tests/disas/if-unreachable-else-params-2.wat @@ -25,7 +25,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -35,7 +35,7 @@ ;; ;; block2: ;; @0058 v7 = uextend.i64 v2 -;; @0058 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0058 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0058 v9 = iadd v8, v7 ;; @0058 v10 = sload16.i64 little heap v9 ;; @005c jump block3 diff --git a/tests/disas/if-unreachable-else-params.wat b/tests/disas/if-unreachable-else-params.wat index 454cbf89b8b4..970876e6ea73 100644 --- a/tests/disas/if-unreachable-else-params.wat +++ b/tests/disas/if-unreachable-else-params.wat @@ -48,7 +48,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -60,7 +60,7 @@ ;; ;; block4: ;; @004b v7 = uextend.i64 v3 ; v3 = 35 -;; @004b v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004b v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @004b v9 = iadd v8, v7 ;; @004b v10 = sload16.i64 little heap v9 ;; @004e trap user11 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 3713784b4207..5b15e795b8b8 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0040 v7 = isub v5, v6 ; v6 = 4 ;; @0040 v8 = icmp ugt v4, v7 ;; @0040 trapnz v8, heap_oob -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 store little heap v3, v10 ;; @0043 jump block1 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -59,7 +59,7 @@ ;; @0048 v7 = isub v5, v6 ; v6 = 4 ;; @0048 v8 = icmp ugt v4, v7 ;; @0048 trapnz v8, heap_oob -;; @0048 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v9 = load.i64 notrap aligned can_move v0+56 ;; @0048 v10 = iadd v9, v4 ;; @0048 v11 = load.i32 little heap v10 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 807ef0c51cba..7b52ebb6f5ce 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0040 v7 = isub v5, v6 ; v6 = 4100 ;; @0040 v8 = icmp ugt v4, v7 ;; @0040 trapnz v8, heap_oob -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @0049 v7 = isub v5, v6 ; v6 = 4100 ;; @0049 v8 = icmp ugt v4, v7 ;; @0049 trapnz v8, heap_oob -;; @0049 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v9 = load.i64 notrap aligned can_move v0+56 ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 0fb86e47dc6c..804a2c20b6ef 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0040 v7 = load.i64 notrap aligned v0+64 ;; @0040 v8 = icmp ugt v6, v7 ;; @0040 trapnz v8, heap_oob -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @004c v7 = load.i64 notrap aligned v0+64 ;; @004c v8 = icmp ugt v6, v7 ;; @004c trapnz v8, heap_oob -;; @004c v9 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v9 = load.i64 notrap aligned can_move v0+56 ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat index f2dd2b6e287d..030324ab711e 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp uge v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 istore8 little heap v3, v8 ;; @0043 jump block1 @@ -47,7 +47,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -55,7 +55,7 @@ ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp uge v4, v5 ;; @0048 trapnz v6, heap_oob -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = uload8.i32 little heap v8 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 514005211a60..e9b669f45ffe 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0040 v7 = isub v5, v6 ; v6 = 4097 ;; @0040 v8 = icmp ugt v4, v7 ;; @0040 trapnz v8, heap_oob -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @0049 v7 = isub v5, v6 ; v6 = 4097 ;; @0049 v8 = icmp ugt v4, v7 ;; @0049 trapnz v8, heap_oob -;; @0049 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v9 = load.i64 notrap aligned can_move v0+56 ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 2738c93981c0..b64e54555fdf 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0040 v7 = load.i64 notrap aligned v0+64 ;; @0040 v8 = icmp ugt v6, v7 ;; @0040 trapnz v8, heap_oob -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @004c v7 = load.i64 notrap aligned v0+64 ;; @004c v8 = icmp ugt v6, v7 ;; @004c trapnz v8, heap_oob -;; @004c v9 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v9 = load.i64 notrap aligned can_move v0+56 ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 2fa019b3f6c3..72a9e7245195 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = iconst.i64 4 ;; @0040 v7 = isub v5, v6 ; v6 = 4 ;; @0040 v8 = icmp ugt v4, v7 -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 @@ -50,7 +50,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -59,7 +59,7 @@ ;; @0048 v6 = iconst.i64 4 ;; @0048 v7 = isub v5, v6 ; v6 = 4 ;; @0048 v8 = icmp ugt v4, v7 -;; @0048 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v9 = load.i64 notrap aligned can_move v0+56 ;; @0048 v10 = iadd v9, v4 ;; @0048 v11 = iconst.i64 0 ;; @0048 v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index fd192faa8baf..aa886558a3b0 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = iconst.i64 4100 ;; @0040 v7 = isub v5, v6 ; v6 = 4100 ;; @0040 v8 = icmp ugt v4, v7 -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 @@ -52,7 +52,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @0049 v6 = iconst.i64 4100 ;; @0049 v7 = isub v5, v6 ; v6 = 4100 ;; @0049 v8 = icmp ugt v4, v7 -;; @0049 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v9 = load.i64 notrap aligned can_move v0+56 ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index a37514106377..3e29b11b5275 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = uadd_overflow_trap v4, v5, heap_oob ; v5 = 0xffff_0004 ;; @0040 v7 = load.i64 notrap aligned v0+64 ;; @0040 v8 = icmp ugt v6, v7 -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 @@ -52,7 +52,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @004c v6 = uadd_overflow_trap v4, v5, heap_oob ; v5 = 0xffff_0004 ;; @004c v7 = load.i64 notrap aligned v0+64 ;; @004c v8 = icmp ugt v6, v7 -;; @004c v9 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v9 = load.i64 notrap aligned can_move v0+56 ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index a3d8d4f385ab..2db998084749 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp uge v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp uge v4, v5 -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 040bdc2b81e8..60bbf550c4ca 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = iconst.i64 4097 ;; @0040 v7 = isub v5, v6 ; v6 = 4097 ;; @0040 v8 = icmp ugt v4, v7 -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 @@ -52,7 +52,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @0049 v6 = iconst.i64 4097 ;; @0049 v7 = isub v5, v6 ; v6 = 4097 ;; @0049 v8 = icmp ugt v4, v7 -;; @0049 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v9 = load.i64 notrap aligned can_move v0+56 ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 727d3707bcdc..d261592bd9a9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = uadd_overflow_trap v4, v5, heap_oob ; v5 = 0xffff_0001 ;; @0040 v7 = load.i64 notrap aligned v0+64 ;; @0040 v8 = icmp ugt v6, v7 -;; @0040 v9 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 @@ -52,7 +52,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -61,7 +61,7 @@ ;; @004c v6 = uadd_overflow_trap v4, v5, heap_oob ; v5 = 0xffff_0001 ;; @004c v7 = load.i64 notrap aligned v0+64 ;; @004c v8 = icmp ugt v6, v7 -;; @004c v9 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v9 = load.i64 notrap aligned can_move v0+56 ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index 2d732c19dc49..e38632f53e5d 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 store little heap v3, v8 ;; @0043 jump block1 @@ -47,7 +47,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -55,7 +55,7 @@ ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp ugt v4, v5 ;; @0048 trapnz v6, heap_oob -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = load.i32 little heap v8 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 071c1cee2210..086f27a4df3d 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = load.i64 notrap aligned v0+64 ;; @0049 v6 = icmp ugt v4, v5 ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 41f7f89e6794..58bdb43441b9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @004c v5 = load.i64 notrap aligned v0+64 ;; @004c v6 = icmp ugt v4, v5 ;; @004c trapnz v6, heap_oob -;; @004c v7 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 125600739e1d..bc08355b4f8f 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp uge v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 istore8 little heap v3, v8 ;; @0043 jump block1 @@ -47,7 +47,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -55,7 +55,7 @@ ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp uge v4, v5 ;; @0048 trapnz v6, heap_oob -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = uload8.i32 little heap v8 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 5d2824ed8bc1..db6fc8becc90 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = load.i64 notrap aligned v0+64 ;; @0049 v6 = icmp ugt v4, v5 ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 96b8d395de55..815c2f1972a0 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @004c v5 = load.i64 notrap aligned v0+64 ;; @004c v6 = icmp ugt v4, v5 ;; @004c trapnz v6, heap_oob -;; @004c v7 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index a93bb3b2516d..4bc0faf827ee 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp ugt v4, v5 -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index ac4833e174e2..a475a4944b98 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 ;; @0049 v5 = load.i64 notrap aligned v0+64 ;; @0049 v6 = icmp ugt v4, v5 -;; @0049 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index a6a4f03bb0c7..2b10a932f2fc 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 ;; @004c v5 = load.i64 notrap aligned v0+64 ;; @004c v6 = icmp ugt v4, v5 -;; @004c v7 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index a32b008368c0..d64e835481f9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp uge v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned v0+64 ;; @0048 v6 = icmp uge v4, v5 -;; @0048 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 5e07e71267f2..d2e45b8afcfe 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 ;; @0049 v5 = load.i64 notrap aligned v0+64 ;; @0049 v6 = icmp ugt v4, v5 -;; @0049 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 9eb8e9472b46..9e1acfb92a2c 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned v0+64 ;; @0040 v6 = icmp ugt v4, v5 -;; @0040 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 ;; @004c v5 = load.i64 notrap aligned v0+64 ;; @004c v6 = icmp ugt v4, v5 -;; @004c v7 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index 994d02a9877f..d80c3271f1a1 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = isub v4, v5 ; v5 = 4 ;; @0040 v7 = icmp ugt v2, v6 ;; @0040 trapnz v7, heap_oob -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 store little heap v3, v9 ;; @0043 jump block1 @@ -48,7 +48,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -57,7 +57,7 @@ ;; @0048 v6 = isub v4, v5 ; v5 = 4 ;; @0048 v7 = icmp ugt v2, v6 ;; @0048 trapnz v7, heap_oob -;; @0048 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v8 = load.i64 notrap aligned can_move v0+56 ;; @0048 v9 = iadd v8, v2 ;; @0048 v10 = load.i32 little heap v9 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 296d8487713a..9b55ba5764dc 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = isub v4, v5 ; v5 = 4100 ;; @0040 v7 = icmp ugt v2, v6 ;; @0040 trapnz v7, heap_oob -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 @@ -50,7 +50,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @0049 v6 = isub v4, v5 ; v5 = 4100 ;; @0049 v7 = icmp ugt v2, v6 ;; @0049 trapnz v7, heap_oob -;; @0049 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v8 = load.i64 notrap aligned can_move v0+56 ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 41755f41364e..e2ca694c51d0 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = load.i64 notrap aligned v0+64 ;; @0040 v7 = icmp ugt v5, v6 ;; @0040 trapnz v7, heap_oob -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 @@ -50,7 +50,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @004c v6 = load.i64 notrap aligned v0+64 ;; @004c v7 = icmp ugt v5, v6 ;; @004c trapnz v7, heap_oob -;; @004c v8 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v8 = load.i64 notrap aligned can_move v0+56 ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat index 214e5d90f8cc..ab453c32f6a6 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp uge v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 istore8 little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp uge v2, v4 ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = uload8.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index ed0426c8125d..965ea70dbfb3 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = isub v4, v5 ; v5 = 4097 ;; @0040 v7 = icmp ugt v2, v6 ;; @0040 trapnz v7, heap_oob -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 @@ -50,7 +50,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @0049 v6 = isub v4, v5 ; v5 = 4097 ;; @0049 v7 = icmp ugt v2, v6 ;; @0049 trapnz v7, heap_oob -;; @0049 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v8 = load.i64 notrap aligned can_move v0+56 ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 2c064d2e54b0..a01e994ff089 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -33,7 +33,7 @@ ;; @0040 v6 = load.i64 notrap aligned v0+64 ;; @0040 v7 = icmp ugt v5, v6 ;; @0040 trapnz v7, heap_oob -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 @@ -50,7 +50,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @004c v6 = load.i64 notrap aligned v0+64 ;; @004c v7 = icmp ugt v5, v6 ;; @004c trapnz v7, heap_oob -;; @004c v8 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v8 = load.i64 notrap aligned can_move v0+56 ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index 449ad49d14e2..fd93721ab1bf 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 4 ;; @0040 v6 = isub v4, v5 ; v5 = 4 ;; @0040 v7 = icmp ugt v2, v6 -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v7, v10, v9 ; v10 = 0 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -57,7 +57,7 @@ ;; @0048 v5 = iconst.i64 4 ;; @0048 v6 = isub v4, v5 ; v5 = 4 ;; @0048 v7 = icmp ugt v2, v6 -;; @0048 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v8 = load.i64 notrap aligned can_move v0+56 ;; @0048 v9 = iadd v8, v2 ;; @0048 v10 = iconst.i64 0 ;; @0048 v11 = select_spectre_guard v7, v10, v9 ; v10 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index f1741d8e1527..8bd1569d114a 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 4100 ;; @0040 v6 = isub v4, v5 ; v5 = 4100 ;; @0040 v7 = icmp ugt v2, v6 -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @0049 v5 = iconst.i64 4100 ;; @0049 v6 = isub v4, v5 ; v5 = 4100 ;; @0049 v7 = icmp ugt v2, v6 -;; @0049 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v8 = load.i64 notrap aligned can_move v0+56 ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index b50d7a0647b3..40450e3a505d 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = uadd_overflow_trap v2, v4, heap_oob ; v4 = 0xffff_0004 ;; @0040 v6 = load.i64 notrap aligned v0+64 ;; @0040 v7 = icmp ugt v5, v6 -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @004c v5 = uadd_overflow_trap v2, v4, heap_oob ; v4 = 0xffff_0004 ;; @004c v6 = load.i64 notrap aligned v0+64 ;; @004c v7 = icmp ugt v5, v6 -;; @004c v8 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v8 = load.i64 notrap aligned can_move v0+56 ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 643e9f858150..43a316fb86b1 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp uge v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp uge v2, v4 -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 328161faab16..9dac946ce68f 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 4097 ;; @0040 v6 = isub v4, v5 ; v5 = 4097 ;; @0040 v7 = icmp ugt v2, v6 -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @0049 v5 = iconst.i64 4097 ;; @0049 v6 = isub v4, v5 ; v5 = 4097 ;; @0049 v7 = icmp ugt v2, v6 -;; @0049 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v8 = load.i64 notrap aligned can_move v0+56 ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index bece38fa8009..4d9824dad65e 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = uadd_overflow_trap v2, v4, heap_oob ; v4 = 0xffff_0001 ;; @0040 v6 = load.i64 notrap aligned v0+64 ;; @0040 v7 = icmp ugt v5, v6 -;; @0040 v8 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 @@ -51,7 +51,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): @@ -59,7 +59,7 @@ ;; @004c v5 = uadd_overflow_trap v2, v4, heap_oob ; v4 = 0xffff_0001 ;; @004c v6 = load.i64 notrap aligned v0+64 ;; @004c v7 = icmp ugt v5, v6 -;; @004c v8 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v8 = load.i64 notrap aligned can_move v0+56 ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index ad335b91a327..6646d81a5296 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 store little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp ugt v2, v4 ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = load.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index f0655273d08c..0296e7ad16da 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = load.i64 notrap aligned v0+64 ;; @0049 v5 = icmp ugt v2, v4 ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 8d1d78d02cb3..4e2aa821a7af 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = load.i64 notrap aligned v0+64 ;; @004c v5 = icmp ugt v2, v4 ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 944309fbbe3d..1bba7c0a4785 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp uge v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 istore8 little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp uge v2, v4 ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = uload8.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index ae400e92f2fa..6dd5f62f961c 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = load.i64 notrap aligned v0+64 ;; @0049 v5 = icmp ugt v2, v4 ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index a019b57543f1..6ee354e95c01 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = load.i64 notrap aligned v0+64 ;; @004c v5 = icmp ugt v2, v4 ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 69d93bb9da65..a7144490b99c 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp ugt v2, v4 -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index f7f6cfb15036..8e6c25e426f4 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = load.i64 notrap aligned v0+64 ;; @0049 v5 = icmp ugt v2, v4 -;; @0049 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index ab74d87b80ce..a328aca1e82d 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = load.i64 notrap aligned v0+64 ;; @004c v5 = icmp ugt v2, v4 -;; @004c v6 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index c763f92fdc1f..41a9d11ab937 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp uge v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = load.i64 notrap aligned v0+64 ;; @0048 v5 = icmp uge v2, v4 -;; @0048 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 60147188f45a..665aa8d37e57 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = load.i64 notrap aligned v0+64 ;; @0049 v5 = icmp ugt v2, v4 -;; @0049 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index d9f54721c81d..5487aaa59155 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = load.i64 notrap aligned v0+64 ;; @0040 v5 = icmp ugt v2, v4 -;; @0040 v6 = load.i64 notrap aligned can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = load.i64 notrap aligned v0+64 ;; @004c v5 = icmp ugt v2, v4 -;; @004c v6 = load.i64 notrap aligned can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index d90cfeca1bee..1a7be680f538 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 0xffff_fffc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_fffc ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 store little heap v3, v8 ;; @0043 jump block1 @@ -47,7 +47,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -55,7 +55,7 @@ ;; @0048 v5 = iconst.i64 0xffff_fffc ;; @0048 v6 = icmp ugt v4, v5 ; v5 = 0xffff_fffc ;; @0048 trapnz v6, heap_oob -;; @0048 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = load.i32 little heap v8 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index f18cc613ae51..408f19f5c6c2 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 0xffff_effc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_effc ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = iconst.i64 0xffff_effc ;; @0049 v6 = icmp ugt v4, v5 ; v5 = 0xffff_effc ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 98f6be8e30f3..3324139c5463 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 0xfffc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xfffc ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @004c v5 = iconst.i64 0xfffc ;; @004c v6 = icmp ugt v4, v5 ; v5 = 0xfffc ;; @004c trapnz v6, heap_oob -;; @004c v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat index 5c5a3a57fcb3..2635c82311cf 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 istore8 little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = uload8.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index e85f6b96b57c..69e22a68297e 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 0xffff_efff ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_efff ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = iconst.i64 0xffff_efff ;; @0049 v6 = icmp ugt v4, v5 ; v5 = 0xffff_efff ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index a79af6549665..bda2cd0cc15d 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,7 +24,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -32,7 +32,7 @@ ;; @0040 v5 = iconst.i64 0xffff ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff ;; @0040 trapnz v6, heap_oob -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @004c v5 = iconst.i64 0xffff ;; @004c v6 = icmp ugt v4, v5 ; v5 = 0xffff ;; @004c trapnz v6, heap_oob -;; @004c v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index b60582206327..fe507fb8e91e 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = iconst.i64 0xffff_fffc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_fffc -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = iconst.i64 0xffff_fffc ;; @0048 v6 = icmp ugt v4, v5 ; v5 = 0xffff_fffc -;; @0048 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 93645c3b0e59..d17f02e9b74a 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = iconst.i64 0xffff_effc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_effc -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 ;; @0049 v5 = iconst.i64 0xffff_effc ;; @0049 v6 = icmp ugt v4, v5 ; v5 = 0xffff_effc -;; @0049 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 3bf097d7c097..dbd5f90c4b91 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = iconst.i64 0xfffc ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xfffc -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 ;; @004c v5 = iconst.i64 0xfffc ;; @004c v6 = icmp ugt v4, v5 ; v5 = 0xfffc -;; @004c v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 646bf3579969..761234df82a8 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 istore8 little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = uload8.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index ec1caad015c9..ad65905a8615 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = iconst.i64 0xffff_efff ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff_efff -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 ;; @0049 v5 = iconst.i64 0xffff_efff ;; @0049 v6 = icmp ugt v4, v5 ; v5 = 0xffff_efff -;; @0049 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 79403464b8b0..9a47ee58a386 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = iconst.i64 0xffff ;; @0040 v6 = icmp ugt v4, v5 ; v5 = 0xffff -;; @0040 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 @@ -50,14 +50,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 ;; @004c v5 = iconst.i64 0xffff ;; @004c v6 = icmp ugt v4, v5 ; v5 = 0xffff -;; @004c v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index b250b56d272c..d892f495e2d7 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 store little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = load.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 41bd965cb714..d8be7984416c 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 -;; @0049 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index d444296db24f..c4a02249ba35 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 -;; @004c v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 95124842c327..34fc6379495a 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 istore8 little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = uload8.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 53b3e64327a3..02f52b5b5cfc 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 -;; @0049 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 42aae9d8d4fe..5e723c5ea2dc 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 -;; @004c v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index ee837786e1ef..af0143701b00 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 store little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = load.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 2c655f91c3e5..cd5d9df4cd5c 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 -;; @0049 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 07e1743a49b2..1af87da238de 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 -;; @004c v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 4f293f188b0f..be7bd3c3d354 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 istore8 little heap v3, v6 ;; @0043 jump block1 @@ -44,12 +44,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0048 v4 = uextend.i64 v2 -;; @0048 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 ;; @0048 v7 = uload8.i32 little heap v6 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 566dffed4c76..d9a8a51998c0 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0049 v4 = uextend.i64 v2 -;; @0049 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 6dd973f72324..788524f91a79 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,12 +24,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): ;; @0040 v4 = uextend.i64 v2 -;; @0040 v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 @@ -46,12 +46,12 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @004c v4 = uextend.i64 v2 -;; @004c v5 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index b5ac2290129f..460fef89e887 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_fffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 store little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_fffc ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = load.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 14e6cf687f83..39cb1a77ef6b 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_effc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_effc ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 1be73a0a48d9..10a55e3303a8 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xfffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xfffc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xfffc ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xfffc ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat index b5064db26bec..368a60bb5337 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_ffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 istore8 little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_ffff ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = uload8.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index e20654fd17b4..f94e1f1f2c3a 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_efff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_efff ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 6c73ec808ce1..67f3c93d9f27 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xffff ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xffff ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index a384ecc9c3c9..d2d0f0cf17a3 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_fffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_fffc ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 7e9edf0c0bf8..04da373d5f53 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_effc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_effc ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 7c1485b9e6a4..813ae6e37ece 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xfffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xfffc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xfffc ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xfffc -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 35462f7349c5..6ad2b7fae68c 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_ffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_ffff ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 0cb1cd7f0c75..7c6595979680 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_efff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_efff ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 60ab0570cbdb..3a81bda9621f 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xffff ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xffff -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index 6bf2bbe9a16c..e195e8a26103 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_fffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 store little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_fffc ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = load.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 98e530b2b1d2..b506eebdff61 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_effc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_effc ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 652f639a575a..7354c34240a5 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xfffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xfffc ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xfffc ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xfffc ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index f32b3e707472..217467d3f726 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_ffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 istore8 little heap v3, v7 ;; @0043 jump block1 @@ -46,14 +46,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_ffff ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff ;; @0048 trapnz v5, heap_oob -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = uload8.i32 little heap v7 ;; @004b jump block1 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 5a823e91455a..0cd432d10090 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_efff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_efff ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff ;; @0049 trapnz v5, heap_oob -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 525561563daf..fe094e9f920f 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -24,14 +24,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff ;; @0040 trapnz v5, heap_oob -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -48,14 +48,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xffff ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xffff ;; @004c trapnz v5, heap_oob -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 76ce54d057cd..7c3c116c2370 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_fffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_fffc ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 873a01a79b51..486a2b9bf8c7 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_effc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_effc ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_effc -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 263701d98ac3..39e73fbc4822 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xfffc ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xfffc -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xfffc ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xfffc -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 418e373477bd..3b45a00ed9cb 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_ffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 @@ -47,13 +47,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0048 v4 = iconst.i64 0xffff_ffff ;; @0048 v5 = icmp ugt v2, v4 ; v4 = 0xffff_ffff -;; @0048 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 42bac7b62757..ce5ffc31a845 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff_efff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0049 v4 = iconst.i64 0xffff_efff ;; @0049 v5 = icmp ugt v2, v4 ; v4 = 0xffff_efff -;; @0049 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0049 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 8554b9b22f30..d8431f063d98 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -24,13 +24,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64, v3: i32): ;; @0040 v4 = iconst.i64 0xffff ;; @0040 v5 = icmp ugt v2, v4 ; v4 = 0xffff -;; @0040 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 @@ -49,13 +49,13 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @004c v4 = iconst.i64 0xffff ;; @004c v5 = icmp ugt v2, v4 ; v4 = 0xffff -;; @004c v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004c v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 diff --git a/tests/disas/memory-min-max-same.wat b/tests/disas/memory-min-max-same.wat index fc4e33d929d8..d93d1e9d556c 100644 --- a/tests/disas/memory-min-max-same.wat +++ b/tests/disas/memory-min-max-same.wat @@ -39,7 +39,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; sig0 = (i64 vmctx, i64) tail ;; stack_limit = gv2 ;; @@ -49,7 +49,7 @@ ;; @0030 v6 = load.i64 notrap aligned readonly can_move v0+88 ;; @0039 v13 = iconst.i64 0x0001_0000 ;; @0039 v17 = iconst.i64 0 -;; @0039 v15 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0039 v15 = load.i64 notrap aligned readonly can_move v0+56 ;; @003e v19 = iconst.i32 1 ;; @002e jump block2(v3) ; v3 = 0 ;; diff --git a/tests/disas/memory.wat b/tests/disas/memory.wat index 802200ad2c5e..419adb5a42cb 100644 --- a/tests/disas/memory.wat +++ b/tests/disas/memory.wat @@ -18,7 +18,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): @@ -26,12 +26,12 @@ ;; @0021 v3 = iconst.i32 0 ;; @0023 v4 = iconst.i32 0 ;; @0025 v5 = uextend.i64 v3 ; v3 = 0 -;; @0025 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0025 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0025 v7 = iadd v6, v5 ;; @0025 store little heap v4, v7 ; v4 = 0 ;; @0028 v8 = iconst.i32 0 ;; @002a v9 = uextend.i64 v8 ; v8 = 0 -;; @002a v10 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @002a v10 = load.i64 notrap aligned readonly can_move v0+56 ;; @002a v11 = iadd v10, v9 ;; @002a v12 = load.i32 little heap v11 ;; @002d brif v12, block2, block4 @@ -40,7 +40,7 @@ ;; @002f v13 = iconst.i32 0 ;; @0031 v14 = iconst.i32 10 ;; @0033 v15 = uextend.i64 v13 ; v13 = 0 -;; @0033 v16 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0033 v16 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v17 = iadd v16, v15 ;; @0033 store little heap v14, v17 ; v14 = 10 ;; @0036 jump block3 @@ -49,7 +49,7 @@ ;; @0037 v18 = iconst.i32 0 ;; @0039 v19 = iconst.i32 11 ;; @003b v20 = uextend.i64 v18 ; v18 = 0 -;; @003b v21 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @003b v21 = load.i64 notrap aligned readonly can_move v0+56 ;; @003b v22 = iadd v21, v20 ;; @003b store little heap v19, v22 ; v19 = 11 ;; @003e jump block3 diff --git a/tests/disas/non-fixed-size-memory.wat b/tests/disas/non-fixed-size-memory.wat index a21e2a9539d5..3c15e1b2e5c3 100644 --- a/tests/disas/non-fixed-size-memory.wat +++ b/tests/disas/non-fixed-size-memory.wat @@ -26,7 +26,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32): @@ -34,7 +34,7 @@ ;; @0041 v5 = load.i64 notrap aligned v0+64 ;; @0041 v6 = icmp uge v4, v5 ;; @0041 trapnz v6, heap_oob -;; @0041 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0041 v7 = load.i64 notrap aligned can_move v0+56 ;; @0041 v8 = iadd v7, v4 ;; @0041 istore8 little heap v3, v8 ;; @0044 jump block1 @@ -49,7 +49,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -57,7 +57,7 @@ ;; @0049 v5 = load.i64 notrap aligned v0+64 ;; @0049 v6 = icmp uge v4, v5 ;; @0049 trapnz v6, heap_oob -;; @0049 v7 = load.i64 notrap aligned can_move checked v0+56 +;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = uload8.i32 little heap v8 ;; @004c jump block1 diff --git a/tests/disas/passive-data.wat b/tests/disas/passive-data.wat index 576e6f408d56..da2c54727841 100644 --- a/tests/disas/passive-data.wat +++ b/tests/disas/passive-data.wat @@ -19,7 +19,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; sig0 = (i64 vmctx, i32, i32, i64, i32, i32) -> i8 tail ;; fn0 = colocated u805306368:6 sig0 ;; stack_limit = gv2 diff --git a/tests/disas/pcc-imported-memory.wat b/tests/disas/pcc-imported-memory.wat deleted file mode 100644 index 564422192f62..000000000000 --- a/tests/disas/pcc-imported-memory.wat +++ /dev/null @@ -1,58 +0,0 @@ -;;! target = "x86_64" -;;! test = "compile" -;;! flags = [ "-Oopt-level=2", "-Cpcc=y" ] - -(module - (type (;0;) (func)) - (import "" "" (memory (;0;) 1)) - (func (;0;) (type 0) - (local i32 i32) - memory.size - local.set 0 - block ;; label = @1 - block ;; label = @2 - memory.size - i32.const 65536 - i32.mul - i32.const 4 - local.get 0 - i32.add - i32.le_u - br_if 0 (;@2;) - local.get 0 - i32.const 0 - i32.le_s - br_if 0 (;@2;) - local.get 0 - i32.load align=1 - local.set 1 - br 1 (;@1;) - end - i32.const 0 - local.set 1 - end - local.get 1 - drop)) - -;; wasm[0]::function[0]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movq 0x30(%rdi), %rax -;; movq 8(%rax), %rax -;; shrq $0x10, %rax -;; movq %rax, %rcx -;; shll $0x10, %ecx -;; leal 4(%rax), %edx -;; cmpl %edx, %ecx -;; jbe 0x3a -;; 21: testl %eax, %eax -;; jle 0x3a -;; 29: movq 0x30(%rdi), %rcx -;; movq (%rcx), %rcx -;; movl %eax, %eax -;; movl (%rcx, %rax), %eax -;; jmp 0x3c -;; 3a: xorl %eax, %eax -;; movq %rbp, %rsp -;; popq %rbp -;; retq diff --git a/tests/disas/pcc-insertlane-x64-avx.wat b/tests/disas/pcc-insertlane-x64-avx.wat deleted file mode 100644 index b57ffa38f044..000000000000 --- a/tests/disas/pcc-insertlane-x64-avx.wat +++ /dev/null @@ -1,233 +0,0 @@ -;;! target = "x86_64" -;;! test = "compile" -;;! flags = [ "-Oopt-level=0", "-Cpcc=y", "-Ccranelift-has-sse41=true", "-Ccranelift-has-avx=true" ] - -(module - (memory 1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load8_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load16_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load32_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load64_lane align=1 1) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f32.load - f32x4.replace_lane 0) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f64.load - f64x2.replace_lane 1) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f64.load - f64x2.replace_lane 0) - (func (param v128 i32) - local.get 1 - local.get 0 - f64x2.extract_lane 1 - f64.store) - (func (param v128 i32) - local.get 1 - local.get 0 - f32x4.extract_lane 1 - f32.store) - (func (param v128 i32) - local.get 1 - local.get 0 - i8x16.extract_lane_s 1 - i32.store8) - (func (param v128 i32) - local.get 1 - local.get 0 - i16x8.extract_lane_s 1 - i32.store16) - (func (param v128 i32) - local.get 1 - local.get 0 - i32x4.extract_lane 1 - i32.store) - (func (param v128 i32) - local.get 1 - local.get 0 - i64x2.extract_lane 1 - i64.store)) -;; wasm[0]::function[0]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vmovdqu 0x14(%rip), %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpinsrb $1, (%rdi, %rsi), %xmm6, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 1e: addb %al, (%rax) -;; 20: subb %ch, (%rcx) -;; 22: subl %ebp, (%rcx) -;; 24: subb %ch, 0x6e(%rcx) -;; 27: andb %ch, 0x28(%rbp) -;; 2a: insl %dx, (%rdi) -;; -;; wasm[0]::function[1]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vmovdqu 0x14(%rip), %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpinsrw $1, (%rdi, %rsi), %xmm6, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 5d: addb %al, (%rax) -;; 5f: addb %ch, (%rax) -;; 61: subl %ebp, (%rcx) -;; 63: subl %ebp, (%rax) -;; 65: imull $0x616d286d, 0x20(%rsi), %ebp -;; -;; wasm[0]::function[2]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vmovdqu 0x14(%rip), %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpinsrd $1, (%rdi, %rsi), %xmm6, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 9e: addb %al, (%rax) -;; a0: subb %ch, (%rcx) -;; a2: subl %ebp, (%rcx) -;; a4: subb %ch, 0x6e(%rcx) -;; a7: andb %ch, 0x28(%rbp) -;; aa: insl %dx, (%rdi) -;; -;; wasm[0]::function[3]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vmovdqu 0x14(%rip), %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpinsrq $1, (%rdi, %rsi), %xmm6, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; de: addb %al, (%rax) -;; e0: subb %ch, (%rcx) -;; e2: subl %ebp, (%rcx) -;; e4: subb %ch, 0x6e(%rcx) -;; e7: andb %ch, 0x28(%rbp) -;; ea: insl %dx, (%rdi) -;; -;; wasm[0]::function[4]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vinsertps $0, (%rdi, %rsi), %xmm0, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[5]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movq %rdi, %r9 -;; movl %edx, %edi -;; movq 0x38(%r9), %r8 -;; vmovsd (%r8, %rdi), %xmm7 -;; vmovlhps %xmm7, %xmm0, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[6]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movq %rdi, %r9 -;; movl %edx, %edi -;; movq 0x38(%r9), %r8 -;; vmovsd (%r8, %rdi), %xmm7 -;; vmovsd %xmm7, %xmm0, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[7]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vpshufd $0xee, %xmm0, %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vmovsd %xmm6, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[8]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vpshufd $1, %xmm0, %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vmovss %xmm6, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[9]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vpextrb $1, %xmm0, %r8d -;; movsbl %r8b, %r8d -;; movl %edx, %r9d -;; movq 0x38(%rdi), %rdi -;; movb %r8b, (%rdi, %r9) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[10]: -;; pushq %rbp -;; movq %rsp, %rbp -;; vpextrw $1, %xmm0, %r8d -;; movswl %r8w, %r8d -;; movl %edx, %r9d -;; movq 0x38(%rdi), %rdi -;; movw %r8w, (%rdi, %r9) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[11]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpextrd $1, %xmm0, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[12]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; vpextrq $1, %xmm0, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq diff --git a/tests/disas/pcc-insertlane-x64.wat b/tests/disas/pcc-insertlane-x64.wat deleted file mode 100644 index fb4dc8babc23..000000000000 --- a/tests/disas/pcc-insertlane-x64.wat +++ /dev/null @@ -1,231 +0,0 @@ -;;! target = "x86_64" -;;! test = "compile" -;;! flags = [ "-Oopt-level=0", "-Cpcc=y", "-Ccranelift-has-sse41=true", "-Ccranelift-has-avx=false" ] - -(module - (memory 1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load8_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load16_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load32_lane align=1 1) - (func (param i32) (result v128) - local.get 0 - v128.const i32x4 0x29292928 0x206e6928 0x616d286d 0x206f7263 - v128.load64_lane align=1 1) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f32.load - f32x4.replace_lane 0) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f64.load - f64x2.replace_lane 1) - (func (param v128 i32) (result v128) - local.get 0 - local.get 1 - f64.load - f64x2.replace_lane 0) - (func (param v128 i32) - local.get 1 - local.get 0 - f64x2.extract_lane 1 - f64.store) - (func (param v128 i32) - local.get 1 - local.get 0 - f32x4.extract_lane 1 - f32.store) - (func (param v128 i32) - local.get 1 - local.get 0 - i8x16.extract_lane_s 1 - i32.store8) - (func (param v128 i32) - local.get 1 - local.get 0 - i16x8.extract_lane_s 1 - i32.store16) - (func (param v128 i32) - local.get 1 - local.get 0 - i32x4.extract_lane 1 - i32.store) - (func (param v128 i32) - local.get 1 - local.get 0 - i64x2.extract_lane 1 - i64.store)) -;; wasm[0]::function[0]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movdqu 0x14(%rip), %xmm0 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pinsrb $1, (%rdi, %rsi), %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 1e: addb %al, (%rax) -;; 20: subb %ch, (%rcx) -;; 22: subl %ebp, (%rcx) -;; 24: subb %ch, 0x6e(%rcx) -;; 27: andb %ch, 0x28(%rbp) -;; 2a: insl %dx, (%rdi) -;; -;; wasm[0]::function[1]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movdqu 0x14(%rip), %xmm0 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pinsrw $1, (%rdi, %rsi), %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 5d: addb %al, (%rax) -;; 5f: addb %ch, (%rax) -;; 61: subl %ebp, (%rcx) -;; 63: subl %ebp, (%rax) -;; 65: imull $0x616d286d, 0x20(%rsi), %ebp -;; -;; wasm[0]::function[2]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movdqu 0x14(%rip), %xmm0 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pinsrd $1, (%rdi, %rsi), %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; 9e: addb %al, (%rax) -;; a0: subb %ch, (%rcx) -;; a2: subl %ebp, (%rcx) -;; a4: subb %ch, 0x6e(%rcx) -;; a7: andb %ch, 0x28(%rbp) -;; aa: insl %dx, (%rdi) -;; -;; wasm[0]::function[3]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movdqu 0x14(%rip), %xmm0 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pinsrq $1, (%rdi, %rsi), %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; df: addb %ch, (%rax) -;; e1: subl %ebp, (%rcx) -;; e3: subl %ebp, (%rax) -;; e5: imull $0x616d286d, 0x20(%rsi), %ebp -;; -;; wasm[0]::function[4]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; insertps $0, (%rdi, %rsi), %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[5]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movq %rdi, %r9 -;; movl %edx, %edi -;; movq 0x38(%r9), %r8 -;; movsd (%r8, %rdi), %xmm7 -;; movlhps %xmm7, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[6]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movq %rdi, %r9 -;; movl %edx, %edi -;; movq 0x38(%r9), %r8 -;; movsd (%r8, %rdi), %xmm7 -;; movsd %xmm7, %xmm0 -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[7]: -;; pushq %rbp -;; movq %rsp, %rbp -;; pshufd $0xee, %xmm0, %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; movsd %xmm6, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[8]: -;; pushq %rbp -;; movq %rsp, %rbp -;; pshufd $1, %xmm0, %xmm6 -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; movss %xmm6, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[9]: -;; pushq %rbp -;; movq %rsp, %rbp -;; pextrb $1, %xmm0, %r8d -;; movsbl %r8b, %r8d -;; movl %edx, %r9d -;; movq 0x38(%rdi), %rdi -;; movb %r8b, (%rdi, %r9) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[10]: -;; pushq %rbp -;; movq %rsp, %rbp -;; pextrw $1, %xmm0, %r8d -;; movswl %r8w, %r8d -;; movl %edx, %r9d -;; movq 0x38(%rdi), %rdi -;; movw %r8w, (%rdi, %r9) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[11]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pextrd $1, %xmm0, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq -;; -;; wasm[0]::function[12]: -;; pushq %rbp -;; movq %rsp, %rbp -;; movl %edx, %esi -;; movq 0x38(%rdi), %rdi -;; pextrq $1, %xmm0, (%rdi, %rsi) -;; movq %rbp, %rsp -;; popq %rbp -;; retq diff --git a/tests/disas/pr2303.wat b/tests/disas/pr2303.wat index 28d43a518096..cdb69eca6565 100644 --- a/tests/disas/pr2303.wat +++ b/tests/disas/pr2303.wat @@ -22,19 +22,19 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0036 v3 = iconst.i32 48 ;; @0038 v4 = iconst.i32 0 ;; @003a v5 = uextend.i64 v4 ; v4 = 0 -;; @003a v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @003a v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @003a v7 = iadd v6, v5 ;; @003a v8 = load.i8x16 little heap v7 ;; @003e v9 = iconst.i32 16 ;; @0040 v10 = uextend.i64 v9 ; v9 = 16 -;; @0040 v11 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0040 v11 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v12 = iadd v11, v10 ;; @0040 v13 = load.i8x16 little heap v12 ;; @0046 brif v2, block2, block4 @@ -45,7 +45,7 @@ ;; @0048 v18 = iadd v16, v17 ;; @004b v19 = iconst.i32 32 ;; @004d v20 = uextend.i64 v19 ; v19 = 32 -;; @004d v21 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @004d v21 = load.i64 notrap aligned readonly can_move v0+56 ;; @004d v22 = iadd v21, v20 ;; @004d v23 = load.i8x16 little heap v22 ;; @0051 v26 = bitcast.i8x16 little v18 @@ -57,7 +57,7 @@ ;; @0052 v29 = isub v27, v28 ;; @0055 v30 = iconst.i32 0 ;; @0057 v31 = uextend.i64 v30 ; v30 = 0 -;; @0057 v32 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0057 v32 = load.i64 notrap aligned readonly can_move v0+56 ;; @0057 v33 = iadd v32, v31 ;; @0057 v34 = load.i8x16 little heap v33 ;; @005b v35 = bitcast.i8x16 little v29 @@ -68,7 +68,7 @@ ;; @005c v37 = bitcast.i16x8 little v15 ;; @005c v38 = imul v36, v37 ;; @005f v39 = uextend.i64 v3 ; v3 = 48 -;; @005f v40 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @005f v40 = load.i64 notrap aligned readonly can_move v0+56 ;; @005f v41 = iadd v40, v39 ;; @005f store little heap v38, v41 ;; @0063 jump block1 diff --git a/tests/disas/readonly-heap-base-pointer1.wat b/tests/disas/readonly-heap-base-pointer1.wat index a5b928417b91..d6f608c00058 100644 --- a/tests/disas/readonly-heap-base-pointer1.wat +++ b/tests/disas/readonly-heap-base-pointer1.wat @@ -13,7 +13,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -21,7 +21,7 @@ ;; @0020 v5 = iconst.i64 0x0001_fffc ;; @0020 v6 = icmp ugt v4, v5 ; v5 = 0x0001_fffc ;; @0020 v9 = iconst.i64 0 -;; @0020 v7 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0020 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0020 v8 = iadd v7, v4 ;; @0020 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 ;; @0020 v11 = load.i32 little heap v10 diff --git a/tests/disas/readonly-heap-base-pointer2.wat b/tests/disas/readonly-heap-base-pointer2.wat index 2c58fd0cb7b8..5ea52e8e66f1 100644 --- a/tests/disas/readonly-heap-base-pointer2.wat +++ b/tests/disas/readonly-heap-base-pointer2.wat @@ -14,7 +14,7 @@ ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned readonly can_move gv3+48 ;; gv5 = load.i64 notrap aligned gv4+8 -;; gv6 = load.i64 notrap aligned readonly can_move checked gv4 +;; gv6 = load.i64 notrap aligned readonly can_move gv4 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32): @@ -23,7 +23,7 @@ ;; @0022 v6 = icmp ugt v4, v5 ; v5 = 0x0001_fffc ;; @0022 v9 = iconst.i64 0 ;; @0022 v12 = load.i64 notrap aligned readonly can_move v0+48 -;; @0022 v7 = load.i64 notrap aligned readonly can_move checked v12 +;; @0022 v7 = load.i64 notrap aligned readonly can_move v12 ;; @0022 v8 = iadd v7, v4 ;; @0022 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 ;; @0022 v11 = load.i32 little heap v10 diff --git a/tests/disas/readonly-heap-base-pointer3.wat b/tests/disas/readonly-heap-base-pointer3.wat index 71f250663dc0..9cd51525f07d 100644 --- a/tests/disas/readonly-heap-base-pointer3.wat +++ b/tests/disas/readonly-heap-base-pointer3.wat @@ -13,14 +13,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i64): ;; @0020 v4 = iconst.i64 0xffff_fffc ;; @0020 v5 = icmp ugt v2, v4 ; v4 = 0xffff_fffc ;; @0020 v8 = iconst.i64 0 -;; @0020 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0020 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0020 v7 = iadd v6, v2 ;; @0020 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 ;; @0020 v10 = load.i32 little heap v9 diff --git a/tests/disas/simd-store.wat b/tests/disas/simd-store.wat index 14fee31d9f5c..2ffbc46fbf29 100644 --- a/tests/disas/simd-store.wat +++ b/tests/disas/simd-store.wat @@ -90,14 +90,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @003f v3 = iconst.i32 0 ;; @0045 v4 = icmp eq v2, v2 ;; @0047 v5 = uextend.i64 v3 ; v3 = 0 -;; @0047 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0047 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0047 v7 = iadd v6, v5 ;; @0047 store little heap v4, v7 ;; @004b jump block1 @@ -112,7 +112,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -121,7 +121,7 @@ ;; @00dd v5 = bitcast.i32x4 little v2 ;; @00dd v6 = icmp slt v4, v5 ;; @00df v7 = uextend.i64 v3 ; v3 = 0 -;; @00df v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00df v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00df v9 = iadd v8, v7 ;; @00df store little heap v6, v9 ;; @00e3 jump block1 @@ -136,7 +136,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -145,7 +145,7 @@ ;; @00ec v5 = bitcast.i64x2 little v2 ;; @00ec v6 = icmp slt v4, v5 ;; @00ef v7 = uextend.i64 v3 ; v3 = 0 -;; @00ef v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00ef v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00ef v9 = iadd v8, v7 ;; @00ef store little heap v6, v9 ;; @00f3 jump block1 @@ -160,14 +160,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @00f6 v3 = iconst.i32 0 ;; @00fc v4 = icmp ult v2, v2 ;; @00fe v5 = uextend.i64 v3 ; v3 = 0 -;; @00fe v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00fe v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @00fe v7 = iadd v6, v5 ;; @00fe store little heap v4, v7 ;; @0102 jump block1 @@ -182,7 +182,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -191,7 +191,7 @@ ;; @010b v5 = bitcast.i16x8 little v2 ;; @010b v6 = icmp ult v4, v5 ;; @010d v7 = uextend.i64 v3 ; v3 = 0 -;; @010d v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @010d v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @010d v9 = iadd v8, v7 ;; @010d store little heap v6, v9 ;; @0111 jump block1 @@ -206,7 +206,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -215,7 +215,7 @@ ;; @011a v5 = bitcast.i32x4 little v2 ;; @011a v6 = icmp ult v4, v5 ;; @011c v7 = uextend.i64 v3 ; v3 = 0 -;; @011c v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @011c v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @011c v9 = iadd v8, v7 ;; @011c store little heap v6, v9 ;; @0120 jump block1 @@ -230,14 +230,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @0123 v3 = iconst.i32 0 ;; @0129 v4 = icmp sgt v2, v2 ;; @012b v5 = uextend.i64 v3 ; v3 = 0 -;; @012b v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @012b v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @012b v7 = iadd v6, v5 ;; @012b store little heap v4, v7 ;; @012f jump block1 @@ -252,7 +252,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -261,7 +261,7 @@ ;; @0138 v5 = bitcast.i16x8 little v2 ;; @0138 v6 = icmp sgt v4, v5 ;; @013a v7 = uextend.i64 v3 ; v3 = 0 -;; @013a v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @013a v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @013a v9 = iadd v8, v7 ;; @013a store little heap v6, v9 ;; @013e jump block1 @@ -276,7 +276,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -285,7 +285,7 @@ ;; @0147 v5 = bitcast.i32x4 little v2 ;; @0147 v6 = icmp sgt v4, v5 ;; @0149 v7 = uextend.i64 v3 ; v3 = 0 -;; @0149 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0149 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0149 v9 = iadd v8, v7 ;; @0149 store little heap v6, v9 ;; @014d jump block1 @@ -300,7 +300,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -309,7 +309,7 @@ ;; @0156 v5 = bitcast.i64x2 little v2 ;; @0156 v6 = icmp sgt v4, v5 ;; @0159 v7 = uextend.i64 v3 ; v3 = 0 -;; @0159 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0159 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0159 v9 = iadd v8, v7 ;; @0159 store little heap v6, v9 ;; @015d jump block1 @@ -324,14 +324,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @0160 v3 = iconst.i32 0 ;; @0166 v4 = icmp ugt v2, v2 ;; @0168 v5 = uextend.i64 v3 ; v3 = 0 -;; @0168 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0168 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0168 v7 = iadd v6, v5 ;; @0168 store little heap v4, v7 ;; @016c jump block1 @@ -346,7 +346,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -355,7 +355,7 @@ ;; @0054 v5 = bitcast.i16x8 little v2 ;; @0054 v6 = icmp eq v4, v5 ;; @0056 v7 = uextend.i64 v3 ; v3 = 0 -;; @0056 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0056 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0056 v9 = iadd v8, v7 ;; @0056 store little heap v6, v9 ;; @005a jump block1 @@ -370,7 +370,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -379,7 +379,7 @@ ;; @0175 v5 = bitcast.i16x8 little v2 ;; @0175 v6 = icmp ugt v4, v5 ;; @0177 v7 = uextend.i64 v3 ; v3 = 0 -;; @0177 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0177 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0177 v9 = iadd v8, v7 ;; @0177 store little heap v6, v9 ;; @017b jump block1 @@ -394,7 +394,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -403,7 +403,7 @@ ;; @0184 v5 = bitcast.i32x4 little v2 ;; @0184 v6 = icmp ugt v4, v5 ;; @0186 v7 = uextend.i64 v3 ; v3 = 0 -;; @0186 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0186 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0186 v9 = iadd v8, v7 ;; @0186 store little heap v6, v9 ;; @018a jump block1 @@ -418,7 +418,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -427,7 +427,7 @@ ;; @0193 v5 = bitcast.f32x4 little v2 ;; @0193 v6 = fcmp eq v4, v5 ;; @0195 v7 = uextend.i64 v3 ; v3 = 0 -;; @0195 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0195 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0195 v9 = iadd v8, v7 ;; @0195 store little heap v6, v9 ;; @0199 jump block1 @@ -442,7 +442,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -451,7 +451,7 @@ ;; @01a2 v5 = bitcast.f64x2 little v2 ;; @01a2 v6 = fcmp eq v4, v5 ;; @01a4 v7 = uextend.i64 v3 ; v3 = 0 -;; @01a4 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01a4 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01a4 v9 = iadd v8, v7 ;; @01a4 store little heap v6, v9 ;; @01a8 jump block1 @@ -466,7 +466,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -475,7 +475,7 @@ ;; @01b1 v5 = bitcast.f32x4 little v2 ;; @01b1 v6 = fcmp ne v4, v5 ;; @01b3 v7 = uextend.i64 v3 ; v3 = 0 -;; @01b3 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01b3 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01b3 v9 = iadd v8, v7 ;; @01b3 store little heap v6, v9 ;; @01b7 jump block1 @@ -490,7 +490,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -499,7 +499,7 @@ ;; @01c0 v5 = bitcast.f64x2 little v2 ;; @01c0 v6 = fcmp ne v4, v5 ;; @01c2 v7 = uextend.i64 v3 ; v3 = 0 -;; @01c2 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01c2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01c2 v9 = iadd v8, v7 ;; @01c2 store little heap v6, v9 ;; @01c6 jump block1 @@ -514,7 +514,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -523,7 +523,7 @@ ;; @01cf v5 = bitcast.f32x4 little v2 ;; @01cf v6 = fcmp lt v4, v5 ;; @01d1 v7 = uextend.i64 v3 ; v3 = 0 -;; @01d1 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01d1 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01d1 v9 = iadd v8, v7 ;; @01d1 store little heap v6, v9 ;; @01d5 jump block1 @@ -538,7 +538,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -547,7 +547,7 @@ ;; @01de v5 = bitcast.f64x2 little v2 ;; @01de v6 = fcmp lt v4, v5 ;; @01e0 v7 = uextend.i64 v3 ; v3 = 0 -;; @01e0 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01e0 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01e0 v9 = iadd v8, v7 ;; @01e0 store little heap v6, v9 ;; @01e4 jump block1 @@ -562,7 +562,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -571,7 +571,7 @@ ;; @01ed v5 = bitcast.f32x4 little v2 ;; @01ed v6 = fcmp le v4, v5 ;; @01ef v7 = uextend.i64 v3 ; v3 = 0 -;; @01ef v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01ef v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01ef v9 = iadd v8, v7 ;; @01ef store little heap v6, v9 ;; @01f3 jump block1 @@ -586,7 +586,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -595,7 +595,7 @@ ;; @01fc v5 = bitcast.f64x2 little v2 ;; @01fc v6 = fcmp le v4, v5 ;; @01fe v7 = uextend.i64 v3 ; v3 = 0 -;; @01fe v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @01fe v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01fe v9 = iadd v8, v7 ;; @01fe store little heap v6, v9 ;; @0202 jump block1 @@ -610,7 +610,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -619,7 +619,7 @@ ;; @0063 v5 = bitcast.i32x4 little v2 ;; @0063 v6 = icmp eq v4, v5 ;; @0065 v7 = uextend.i64 v3 ; v3 = 0 -;; @0065 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0065 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0065 v9 = iadd v8, v7 ;; @0065 store little heap v6, v9 ;; @0069 jump block1 @@ -634,7 +634,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -643,7 +643,7 @@ ;; @020b v5 = bitcast.f32x4 little v2 ;; @020b v6 = fcmp gt v4, v5 ;; @020d v7 = uextend.i64 v3 ; v3 = 0 -;; @020d v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @020d v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @020d v9 = iadd v8, v7 ;; @020d store little heap v6, v9 ;; @0211 jump block1 @@ -658,7 +658,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -667,7 +667,7 @@ ;; @021a v5 = bitcast.f64x2 little v2 ;; @021a v6 = fcmp gt v4, v5 ;; @021c v7 = uextend.i64 v3 ; v3 = 0 -;; @021c v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @021c v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @021c v9 = iadd v8, v7 ;; @021c store little heap v6, v9 ;; @0220 jump block1 @@ -682,7 +682,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -691,7 +691,7 @@ ;; @0229 v5 = bitcast.f32x4 little v2 ;; @0229 v6 = fcmp ge v4, v5 ;; @022b v7 = uextend.i64 v3 ; v3 = 0 -;; @022b v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @022b v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @022b v9 = iadd v8, v7 ;; @022b store little heap v6, v9 ;; @022f jump block1 @@ -706,7 +706,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -715,7 +715,7 @@ ;; @0238 v5 = bitcast.f64x2 little v2 ;; @0238 v6 = fcmp ge v4, v5 ;; @023a v7 = uextend.i64 v3 ; v3 = 0 -;; @023a v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @023a v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @023a v9 = iadd v8, v7 ;; @023a store little heap v6, v9 ;; @023e jump block1 @@ -730,7 +730,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -739,7 +739,7 @@ ;; @0072 v5 = bitcast.i64x2 little v2 ;; @0072 v6 = icmp eq v4, v5 ;; @0075 v7 = uextend.i64 v3 ; v3 = 0 -;; @0075 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0075 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0075 v9 = iadd v8, v7 ;; @0075 store little heap v6, v9 ;; @0079 jump block1 @@ -754,14 +754,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @007c v3 = iconst.i32 0 ;; @0082 v4 = icmp ne v2, v2 ;; @0084 v5 = uextend.i64 v3 ; v3 = 0 -;; @0084 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0084 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0084 v7 = iadd v6, v5 ;; @0084 store little heap v4, v7 ;; @0088 jump block1 @@ -776,7 +776,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -785,7 +785,7 @@ ;; @0091 v5 = bitcast.i16x8 little v2 ;; @0091 v6 = icmp ne v4, v5 ;; @0093 v7 = uextend.i64 v3 ; v3 = 0 -;; @0093 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @0093 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0093 v9 = iadd v8, v7 ;; @0093 store little heap v6, v9 ;; @0097 jump block1 @@ -800,7 +800,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -809,7 +809,7 @@ ;; @00a0 v5 = bitcast.i32x4 little v2 ;; @00a0 v6 = icmp ne v4, v5 ;; @00a2 v7 = uextend.i64 v3 ; v3 = 0 -;; @00a2 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00a2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00a2 v9 = iadd v8, v7 ;; @00a2 store little heap v6, v9 ;; @00a6 jump block1 @@ -824,7 +824,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -833,7 +833,7 @@ ;; @00af v5 = bitcast.i64x2 little v2 ;; @00af v6 = icmp ne v4, v5 ;; @00b2 v7 = uextend.i64 v3 ; v3 = 0 -;; @00b2 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00b2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00b2 v9 = iadd v8, v7 ;; @00b2 store little heap v6, v9 ;; @00b6 jump block1 @@ -848,14 +848,14 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): ;; @00b9 v3 = iconst.i32 0 ;; @00bf v4 = icmp slt v2, v2 ;; @00c1 v5 = uextend.i64 v3 ; v3 = 0 -;; @00c1 v6 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00c1 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @00c1 v7 = iadd v6, v5 ;; @00c1 store little heap v4, v7 ;; @00c5 jump block1 @@ -870,7 +870,7 @@ ;; gv2 = load.i64 notrap aligned gv1+24 ;; gv3 = vmctx ;; gv4 = load.i64 notrap aligned gv3+64 -;; gv5 = load.i64 notrap aligned readonly can_move checked gv3+56 +;; gv5 = load.i64 notrap aligned readonly can_move gv3+56 ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i8x16): @@ -879,7 +879,7 @@ ;; @00ce v5 = bitcast.i16x8 little v2 ;; @00ce v6 = icmp slt v4, v5 ;; @00d0 v7 = uextend.i64 v3 ; v3 = 0 -;; @00d0 v8 = load.i64 notrap aligned readonly can_move checked v0+56 +;; @00d0 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00d0 v9 = iadd v8, v7 ;; @00d0 store little heap v6, v9 ;; @00d4 jump block1 diff --git a/tests/pcc_memory.rs b/tests/pcc_memory.rs deleted file mode 100644 index bb2dc7f05f3c..000000000000 --- a/tests/pcc_memory.rs +++ /dev/null @@ -1,107 +0,0 @@ -//! Tests for proof-carrying-code-based validation of memory accesses -//! in Wasmtime/Cranelift-compiled Wasm, with various combinations of -//! memory settings. - -#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))] -mod pcc_memory_tests { - use wasmtime::*; - - const TESTS: &'static [&'static str] = &[ - r#" - local.get 0 - i32.load8_u - drop - "#, - r#" - local.get 0 - i32.load8_u offset=0x10000 - drop - "#, - r#" - local.get 0 - i32.load16_u - drop - "#, - r#" - local.get 0 - i32.load16_u offset=0x10000 - drop - "#, - r#" - local.get 0 - i32.load - drop - "#, - r#" - local.get 0 - i32.load offset=0x10000 - drop - "#, - r#" - local.get 0 - i64.load - drop - "#, - r#" - local.get 0 - i64.load offset=0x10000 - drop - "#, - ]; - - #[test] - #[cfg_attr(miri, ignore)] - fn test_build() { - let _ = env_logger::try_init(); - const KIB: u64 = 1024; - const MIB: u64 = 1024 * KIB; - const GIB: u64 = 1024 * MIB; - - let mut bodies = vec![]; - for (mem_min, mem_max) in [(1, 1), (10, 20)] { - for &snippet in TESTS { - bodies.push(format!( - "(module (memory {mem_min} {mem_max}) (func (param i32) {snippet}))" - )); - } - let all_snippets = TESTS - .iter() - .map(|s| s.to_owned()) - .collect::>() - .join("\n"); - bodies.push(format!( - "(module (memory {mem_min} {mem_max}) (func (param i32) {all_snippets}))" - )); - } - - for test in &bodies { - for memory_reservation in [4 * GIB] { - for guard_size in [2 * GIB] { - for enable_spectre in [true /* not yet supported by PCC: false */] { - for _memory_bits in [32 /* not yet supported by PCC: 64 */] { - log::trace!("test:\n{test}\n"); - log::trace!("static {memory_reservation:x} guard {guard_size:x}"); - let mut cfg = Config::new(); - cfg.memory_reservation(memory_reservation); - cfg.memory_guard_size(guard_size); - cfg.cranelift_pcc(true); - unsafe { - cfg.cranelift_flag_set( - "enable_heap_access_spectre_mitigation", - &enable_spectre.to_string(), - ); - } - // TODO: substitute memory32/memory64 into - // test module. - - let engine = Engine::new(&cfg).unwrap(); - - let _module = Module::new(&engine, test) - .expect("compilation with PCC should succeed"); - } - } - } - } - } - } -}