generate_definitions.py

import math

pipelines = ["xarith", "xlogic", "xshift", "xmultl", "xmulth", "xdiv"]
xarith_ops = ["add", "slt", "cmp", "branch", "jal", "jalr"]
xlogic_ops = ["and", "or", "xor", "shf", "sla", "clz", "ctz", "pop"]
ahb_htrans = ["idle", "busy", "nonseq", "seq"]

rvfi_metadata = {
    "valid": 1,
    "order": 64,
    "insn": 32,
    "trap": 1,
    "halt": 1,
    "intr": 1,
    "mode": 2,
    "ixl": 2
}

rvfi_pc = {
    "pc_rdata": 64,
    "pc_wdata": 64,
}

rvfi_reg = {
    "rs1_addr": 5,
    "rs2_addr": 5,
    "rs1_rdata": 64,
    "rs2_rdata": 64,
    "rd_addr": 5,
    "rd_wdata": 64,
}

bits = lambda n: math.ceil(math.log2(n))

def iota(n):
    b = bits(n)
    for i in range(n):
        yield f"{b}'h{i:x}"

def enum(prefix, l):
    width = max(len(s) for s in l)
    for name, value in zip(l, iota(len(l))):
        name = name.ljust(width)
        name = f"{prefix}_{name}".upper()
        yield name, value

def rvfi_ports(type, prefix, ports):
    for name, length in ports.items():
        slice = ""
        if length > 1: slice = f"[{str(length - 1).rjust(2)}:0]"
        slice = slice.ljust(6)

        yield f"{type} {slice} {prefix}_{name}"

rvfi_inputs  = lambda ports: rvfi_ports("input  wire", "if", ports)
rvfi_regs    = lambda ports: rvfi_ports("reg ", "rf", ports)
rvfi_outputs = lambda ports: rvfi_ports("output wire", "of", ports)

def rvfi_defines(name, ports):
    s = ""

    s += f"`define RVFI_{name.upper()}_INPUTS(i) \\\n"
    for i, line in enumerate(rvfi_inputs(ports)):
        s += f"\t{line}``i"
        if i < len(ports) - 1:
            s += ", \\"
        s += "\n"
    s += "\n"

    s += f"`define RVFI_{name.upper()}_REGS(i) \\\n"
    for i, line in enumerate(rvfi_regs(ports)):
        s += f"\t{line}``i"
        if i < len(ports) - 1:
            s += ", \\"
        s += "\n"
    s += "\n"

    s += f"`define RVFI_{name.upper()}_OUTPUTS(i) \\\n"
    for i, line in enumerate(rvfi_outputs(ports)):
        s += f"\t{line}``i"
        if i < len(ports) - 1:
            s += ", \\"
        s += "\n"
    s += "\n"

    return s

def main():
    s = ""

    s += "// This file is autogenerated, do not edit.\n"
    s += "// Instead modify generate_definitions.py\n"
    s += "\n"
    s += "`ifndef WARP_DEFINES\n"
    s += "`define WARP_DEFINES\n"
    s += "\n"

    for name, value in enum("pipeline", pipelines):
        s += f"`define {name} {value}\n"
    s += "\n"

    for name, value in enum("xarith_op", xarith_ops):
        s += f"`define {name} {value}\n"
    s += "\n"

    for name, value in enum("xlogic_op", xlogic_ops):
        s += f"`define {name} {value}\n"
    s += "\n"

    for name, value in enum("ahb_htrans", ahb_htrans):
        s += f"`define {name} {value}\n"
    s += "\n"

    s += rvfi_defines("metadata", rvfi_metadata)
    s += rvfi_defines("pc", rvfi_pc)
    # s += rvfi_defines("reg_addr", rvfi_reg_addr)
    # s += rvfi_defines("reg_rdata", rvfi_reg_rdata)
    s += rvfi_defines("reg", rvfi_reg)

    # misc hardcoded defines
    s += "`define CANONICAL_NOP 32'h00000013\n"
    s += "\n"

    s += "`endif /* WARP_DEFINES */\n"

    print(s, end="")


if __name__ == "__main__":
    main()