diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts index 5a8ec61e1c7c..8b0aaf63903f 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts @@ -28,18 +28,6 @@ stdout-path = "serial0:115200n8"; }; - lcd_bias: regulator-lcd-bias { - compatible = "regulator-fixed"; - regulator-name = "lcd_bias"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&pm4125_l17>; - gpio = <&tlmm 151 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-0 = <&lcd_bias_en>; - pinctrl-names = "default"; - }; - sound: sound { compatible = "qcom,shikra-cqm-sndcard"; model = "shikra-cqm-evk"; @@ -279,46 +267,6 @@ }; }; -&mdss { - status = "okay"; -}; - -&mdss_dsi0 { - vdda-supply = <&pm4125_l5>; - status = "okay"; - - panel@0 { - compatible = "dlc,dlc0697", "ilitek,ili7807s"; - reg = <0>; - - reset-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; - backlight-en-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>; - - vddi-supply = <&pm4125_l15>; - avdd-supply = <&lcd_bias>; - avee-supply = <&lcd_bias>; - - pinctrl-0 = <&panel_rst_n &panel_te_pin>; - pinctrl-1 = <&panel_rst_n_suspend>; - pinctrl-names = "default", "sleep"; - - port { - panel_in: endpoint { - remote-endpoint = <&mdss_dsi0_out>; - }; - }; - }; -}; - -&mdss_dsi0_out { - remote-endpoint = <&panel_in>; - data-lanes = <0 1 2 3>; -}; - -&mdss_dsi0_phy { - status = "okay"; -}; - &pcie { wake-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>; @@ -431,13 +379,6 @@ remote-endpoint = <&usb_1_dwc3_hs>; }; -&pm4125_l5 { - /* DSI VDDA - must be at NOM voltage for PHY PLL lock */ - regulator-min-microvolt = <1232000>; - regulator-max-microvolt = <1232000>; - regulator-allow-set-load; -}; - &pm4125_ss_in { remote-endpoint = <&usb_qmpphy_out>; }; @@ -611,34 +552,6 @@ bias-disable; }; - lcd_bias_en: lcd-bias-en-state { - pins = "gpio151"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - panel_rst_n: panel-rst-n-state { - pins = "gpio3"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - - panel_rst_n_suspend: panel-rst-n-suspend-state { - pins = "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - panel_te_pin: panel-te-pin-state { - pins = "gpio86"; - function = "mdp_vsync_p"; - drive-strength = <2>; - bias-pull-down; - }; - pcie_default_state: pcie-default-state { clkreq-pins { pins = "gpio117"; diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts index 8c3cd39cbd23..3ff05b581ba5 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts @@ -78,18 +78,6 @@ }; }; - lcd_bias: regulator-lcd-bias { - compatible = "regulator-fixed"; - regulator-name = "lcd_bias"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&pm4125_l17>; - gpio = <&tlmm 151 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-0 = <&lcd_bias_en>; - pinctrl-names = "default"; - }; - vreg_0p9: regulator-0v9 { compatible = "regulator-fixed"; regulator-name = "VREG_0P9"; @@ -259,46 +247,6 @@ }; }; -&mdss { - status = "okay"; -}; - -&mdss_dsi0 { - vdda-supply = <&pm4125_l5>; - status = "okay"; - - panel@0 { - compatible = "dlc,dlc0697", "ilitek,ili7807s"; - reg = <0>; - - reset-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; - backlight-en-gpios = <&tlmm 91 GPIO_ACTIVE_HIGH>; - - vddi-supply = <&pm4125_l15>; - avdd-supply = <&lcd_bias>; - avee-supply = <&lcd_bias>; - - pinctrl-0 = <&panel_rst_n &panel_te_pin>; - pinctrl-1 = <&panel_rst_n_suspend>; - pinctrl-names = "default", "sleep"; - - port { - panel_in: endpoint { - remote-endpoint = <&mdss_dsi0_out>; - }; - }; - }; -}; - -&mdss_dsi0_out { - remote-endpoint = <&panel_in>; - data-lanes = <0 1 2 3>; -}; - -&mdss_dsi0_phy { - status = "okay"; -}; - &pcie { wake-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>; @@ -411,13 +359,6 @@ remote-endpoint = <&usb_1_dwc3_hs>; }; -&pm4125_l5 { - /* DSI VDDA - must be at NOM voltage for PHY PLL lock */ - regulator-min-microvolt = <1232000>; - regulator-max-microvolt = <1232000>; - regulator-allow-set-load; -}; - &pm4125_ss_in { remote-endpoint = <&usb_qmpphy_out>; }; @@ -532,34 +473,6 @@ bias-disable; }; - lcd_bias_en: lcd-bias-en-state { - pins = "gpio151"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - panel_rst_n: panel-rst-n-state { - pins = "gpio3"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - - panel_rst_n_suspend: panel-rst-n-suspend-state { - pins = "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - panel_te_pin: panel-te-pin-state { - pins = "gpio86"; - function = "mdp_vsync_p"; - drive-strength = <2>; - bias-pull-down; - }; - pcie_default_state: pcie-default-state { clkreq-pins { pins = "gpio117"; diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index cbd4049e8a49..0aee702fe6aa 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -4,7 +4,6 @@ */ #include -#include #include #include #include @@ -3004,206 +3003,6 @@ status = "disabled"; }; - mdss: display-subsystem@5e00000 { - compatible = "qcom,shikra-mdss", "qcom,qcm2290-mdss"; - reg = <0x0 0x05e00000 0x0 0x1000>; - reg-names = "mdss"; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - - clocks = <&gcc GCC_DISP_AHB_CLK>, - <&gcc GCC_DISP_HF_AXI_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "iface", - "bus", - "core"; - - resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; - - power-domains = <&dispcc MDSS_GDSC>; - - iommus = <&apps_smmu 0x420 0x2>, - <&apps_smmu 0x421 0x0>; - - interconnects = <&mmrt_virt MASTER_MDP_PORT0 RPM_ALWAYS_TAG - &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, - <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG - &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>; - interconnect-names = "mdp0-mem", - "cpu-cfg"; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - status = "disabled"; - - mdp: display-controller@5e01000 { - compatible = "qcom,shikra-dpu", "qcom,qcm2290-dpu"; - reg = <0x0 0x05e01000 0x0 0x8f000>, - <0x0 0x05eb0000 0x0 0x3000>; - reg-names = "mdp", - "vbif"; - - interrupt-parent = <&mdss>; - interrupts = <0>; - - clocks = <&gcc GCC_DISP_HF_AXI_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "bus", - "iface", - "core", - "lut", - "vsync"; - - operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmpd QCM2290_VDDCX>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dpu_intf1_out: endpoint { - remote-endpoint = <&mdss_dsi0_in>; - }; - }; - }; - - mdp_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmpd_opp_min_svs>; - }; - - opp-192000000 { - opp-hz = /bits/ 64 <192000000>; - required-opps = <&rpmpd_opp_low_svs>; - }; - - opp-256000000 { - opp-hz = /bits/ 64 <256000000>; - required-opps = <&rpmpd_opp_svs>; - }; - - opp-307200000 { - opp-hz = /bits/ 64 <307200000>; - required-opps = <&rpmpd_opp_svs_plus>; - }; - - opp-384000000 { - opp-hz = /bits/ 64 <384000000>; - required-opps = <&rpmpd_opp_nom>; - }; - }; - }; - - mdss_dsi0: dsi@5e94000 { - compatible = "qcom,shikra-dsi-ctrl", - "qcom,qcm2290-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0x0 0x05e94000 0x0 0x400>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <4>; - - clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, - <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, - <&dispcc DISP_CC_MDSS_PCLK0_CLK>, - <&dispcc DISP_CC_MDSS_ESC0_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&gcc GCC_DISP_HF_AXI_CLK>; - clock-names = "byte", - "byte_intf", - "pixel", - "core", - "iface", - "bus"; - - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, - <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, - <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; - - operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmpd QCM2290_VDDCX>; - phys = <&mdss_dsi0_phy>; - - #address-cells = <1>; - #size-cells = <0>; - - status = "disabled"; - - dsi_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmpd_opp_min_svs>; - }; - - opp-164000000 { - opp-hz = /bits/ 64 <164000000>; - required-opps = <&rpmpd_opp_low_svs>; - }; - - opp-187500000 { - opp-hz = /bits/ 64 <187500000>; - required-opps = <&rpmpd_opp_svs>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi0_in: endpoint { - remote-endpoint = <&dpu_intf1_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi0_out: endpoint { - }; - }; - }; - }; - - mdss_dsi0_phy: phy@5e94400 { - compatible = "qcom,dsi-phy-14nm-2290"; - reg = <0x0 0x05e94400 0x0 0x100>, - <0x0 0x05e94500 0x0 0x300>, - <0x0 0x05e94800 0x0 0x188>; - reg-names = "dsi_phy", - "dsi_phy_lane", - "dsi_pll"; - - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&rpmcc RPM_SMD_XO_CLK_SRC>; - clock-names = "iface", - "ref"; - - power-domains = <&rpmpd QCM2290_VDDMX>; - required-opps = <&rpmpd_opp_nom>; - - #clock-cells = <1>; - #phy-cells = <0>; - - status = "disabled"; - }; - }; - dispcc: clock-controller@5f00000 { compatible = "qcom,shikra-dispcc", "qcom,qcm2290-dispcc"; reg = <0x0 0x05f00000 0x0 0x20000>; @@ -3211,8 +3010,8 @@ <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&gcc GCC_DISP_GPLL0_CLK_SRC>, <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, - <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, - <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <0>, + <0>, <0>, <0>, <&sleep_clk>; diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0e87ea29c7ad..8380de676803 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -944,7 +944,6 @@ CONFIG_DRM_SUN8I_MIXER=m CONFIG_DRM_MSM=m CONFIG_DRM_TEGRA=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m -CONFIG_DRM_PANEL_ILITEK_ILI7807S=m CONFIG_DRM_PANEL_LVDS=m CONFIG_DRM_PANEL_SIMPLE=m CONFIG_DRM_PANEL_EDP=m