diff --git a/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h b/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h
index daba470c..a13abd95 100644
--- a/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h
+++ b/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h
@@ -96,6 +96,9 @@ class QemuCpuRiscv64 : public QemuCpu
         qemu::CpuRiscv32 cpu(get_qemu_dev());
         cpu.register_reset();
     }
+
+    // Runtime reset-vector override; the core re-reads it on the next reset.
+    void set_resetvec(uint64_t addr) { get_qemu_dev().set_prop_uint("resetvec", addr); }
 };
 
 class cpu_riscv64 : public QemuCpuRiscv64