From d02be9865c0e73c29ed81879fa2b5df0b90693b4 Mon Sep 17 00:00:00 2001 From: Gaurav Sharma Date: Mon, 6 Jul 2026 15:50:33 -0700 Subject: [PATCH] cpu_riscv64: add set_resetvec() via runtime resetvec property Add a runtime reset-vector override that sets the "resetvec" QOM property (runtime-settable in libqemu via realized_set_allowed). The CPU re-reads env.resetvec on the next reset, so pairing this with a reset pulse redirects the core. No new libqemu export is needed. Signed-off-by: Gaurav Sharma --- qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h b/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h index daba470c..a13abd95 100644 --- a/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h +++ b/qemu-components/cpu_riscv/cpu_riscv64/include/riscv64.h @@ -96,6 +96,9 @@ class QemuCpuRiscv64 : public QemuCpu qemu::CpuRiscv32 cpu(get_qemu_dev()); cpu.register_reset(); } + + // Runtime reset-vector override; the core re-reads it on the next reset. + void set_resetvec(uint64_t addr) { get_qemu_dev().set_prop_uint("resetvec", addr); } }; class cpu_riscv64 : public QemuCpuRiscv64