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Commit 0eb80e4

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Split repository up into a multi-crate structure
Separate simulator from assembly/compilation code.
1 parent ba3cbe1 commit 0eb80e4

14 files changed

Lines changed: 72 additions & 52 deletions

.gitignore

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target/
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artifacts/
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*.vcd
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.idea/

Cargo.lock

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Cargo.toml

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[package]
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name = "tta-sim"
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version = "0.1.0"
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edition = "2021"
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[lib]
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name = "tta_sim"
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path = "src/lib.rs"
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[[bin]]
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name = "tta-sim"
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path = "src/main.rs"
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[dependencies]
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marlin = { version = "0.7.2", features = ["verilog"] }
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tokio = { version = "1.0", features = ["full"] }
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eyre = "0.6"
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camino = "1.1"
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env_logger = "0.10"
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[dev-dependencies]
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proptest = "1.4"
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[workspace]
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members = ["crates/tta-asm", "crates/tta-sim"]
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resolver = "2"

crates/tta-asm/Cargo.toml

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[package]
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name = "tta-asm"
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version = "0.1.0"
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edition = "2021"
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[lib]
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name = "tta_asm"
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@@ -345,7 +345,7 @@ impl Emitter {
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} else {
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self.output.push(
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instr()
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.src_mem_op(*addr, crate::AccessWidth::Word, 0)
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.src_mem_op(*addr, crate::assembler::AccessWidth::Word, 0)
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.dst(Unit::UNIT_REGISTER).di(reg),
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);
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}
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self.output.push(
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instr()
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.src(Unit::UNIT_REGISTER).si(reg)
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.dst_mem_op(*addr, crate::AccessWidth::Word, 0),
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.dst_mem_op(*addr, crate::assembler::AccessWidth::Word, 0),
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);
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}
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}

crates/tta-asm/src/lib.rs

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pub mod assembler;
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pub mod dataflow;
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pub use assembler::{instr, AccessWidth, ALUOp, Instr, RegMode, Unit};

crates/tta-sim/Cargo.toml

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[package]
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name = "tta-sim"
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version = "0.1.0"
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edition = "2021"
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[lib]
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name = "tta_sim"
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[[bin]]
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name = "tta-sim"
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path = "src/main.rs"
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[dependencies]
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tta-asm = { path = "../tta-asm" }
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marlin = { version = "0.7.2", features = ["verilog"] }
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tokio = { version = "1.0", features = ["full"] }
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eyre = "0.6"
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camino = "1.1"
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env_logger = "0.10"
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[dev-dependencies]
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proptest = "1.4"

src/lib.rs renamed to crates/tta-sim/src/lib.rs

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pub mod assembler;
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pub mod dataflow;
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pub mod simulator;
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pub use assembler::{instr, AccessWidth, ALUOp, Instr, RegMode, Unit};
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// Re-export tta-asm so downstream users only need one dependency.
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pub use tta_asm::{self, assembler, dataflow, instr, AccessWidth, ALUOp, Instr, RegMode, Unit};
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pub use simulator::{
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create_simtop_runtime, create_tta_runtime, test_basic_reset_sequence, SimTop, SimTopHarness,
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SramSim, TtaTestbench,
File renamed without changes.

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