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Xtensa Support #5467
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arch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.standard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.
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arch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.standard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.
Hi guys,
is it currently possible to compile Zig for the ESP8266/ESP32? According to this forum post it seems like LLVM supports it as a target. I would love to help with this feat, but I'm not really sure where to start. The most helpful thing I could find is this fork.
If someone could provide me a little kickstart from which I can dive into this matter I would be very thankful :)