Skip to content

Make vPortYield weak in ARM_CRx_No_GIC port#1414

Open
maximdeclercq wants to merge 1 commit into
FreeRTOS:mainfrom
maximdeclercq:main-arm-crx-weak
Open

Make vPortYield weak in ARM_CRx_No_GIC port#1414
maximdeclercq wants to merge 1 commit into
FreeRTOS:mainfrom
maximdeclercq:main-arm-crx-weak

Conversation

@maximdeclercq
Copy link
Copy Markdown
Contributor

This change makes vPortYield a weak symbol so platforms with a dedicated software interrupt mechanism can substitute their own yield trigger by providing a strong vPortYield definition.

Default behaviour is unchanged. When no strong override is linked, the weak
default in portASM.S emits SVC 0 dispatched by FreeRTOS_SVC_Handler.

Test Steps

This patch has been tested using the ARM_CRx_No_GIC Example.

Checklist:

  • I have tested my changes. No regression in existing tests.
  • I have modified and/or added unit-tests to cover the code changes in this Pull Request.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

Mark vPortYield as a weak symbol so chips with a dedicated software
interrupt register can substitute their own yield trigger.

Default behaviour is unchanged when no strong override is linked.

Signed-off-by: Maxim De Clercq <maximdeclercq00@gmail.com>
@sonarqubecloud
Copy link
Copy Markdown

sonarqubecloud Bot commented May 9, 2026

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant