Add support of SMP. The third try #208
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| #define ALL1_64BIT (0xffffffffffffffff) | ||
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| /* TODO: This is for MMU48 only. */ |
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Please be more verbose here.
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Actually, I have a zero knowledge about MMU subsystem. I rearranged some code blocks and substituted global MMU variables by local ones for each CPU. All comments are kept as is. MMU code must be revisited a bit later.
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| static uint64_t | ||
| root_ptr_for_vaddr(uint64_t vaddr, bool *valid) | ||
| root_ptr_for_vaddr(CPUARCState *env, uint64_t vaddr, bool *valid) |
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Please add a comment about what this function should do.
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The same as for the previous request.
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@kolerov could you please also add information on what is actually working with that implementation. I.e. if normally built images of Zephyr RTOS and the Linux kenrel for SMP HS3x/4x/5x/6x work as expected regardless of the mentioned known issues or there's a smaller subset of real software that works as of today. |
I will explain it in details tomorrow. In short, Linux works well. I've not tested Zephyr yet. |
kolerov
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I've update and simplified the implementation. Everything is documented now in details. Also, Inter-Core Interrupts unit if fixed - it was incorrect. |
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This patch moves data for MMU to core's state storage. It's necessary for adding support of SMP since each core requires it's own MMU state. Signed-off-by: Yuriy Kolerov <[email protected]>
Using QTimer for RTC implementation is redundent and meaningless since it's just free-running clock. Also, enable RTC by default. If it's not available then Linux uses Timer 1 as fallback which is much less accurate. Signed-off-by: Yuriy Kolerov <[email protected]>
This commit introduces a support of SMP for ARCv2 and ARCv3 targets in QEMU. A partial support of ICI, IDU and GFRC subsystems is presented enough for running Linux. Known issues: * Some IDU commands like CMD_IDU_GEN_CIRQ, CMD_IDU_ACK_CIRQ and CMD_IDU_CHECK_FIRST are not supported yet. They may be implemented correctly only with a distinct interrupt controller for IDU. All devices are connected to the first core because of the same reason. It means that Linux cannot really control distributing of interrupts. * Only reading operations for GFRC are supported. * Only a small subset of ICI commands is supported. * SMP for HS4x is slower than for HS5x and HS6x. SMP mode may be turned on by -smp N option where N stands for a number of cores. Co-authored-by: Cupertino Miranda <[email protected]> Co-authored-by: Jose Abreu <[email protected]> Signed-off-by: Yuriy Kolerov <[email protected]>
Signed-off-by: Yuriy Kolerov <[email protected]>
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This set of commits introduces a support of SMP for ARCv2 and ARCv3 targets in QEMU. It's based on Cupertino's work. A partial support of ICI, IDU and GFRC subsystems is presented enough for running Linux.
Known issues:
and CMD_IDU_CHECK_FIRST are not supported yet. They may be
implemented correctly only with a distinct interrupt controller for
IDU. All devices are connected to the first core because of the same
reason. It means that Linux cannot really control distributing of
interrupts.
SMP mode may be turned on by -smp N option where N stands for a number of cores.