fix invalid load

[JensWehner]

Summary

Fix an out-of-bounds read in md_j_1dm_kernel when the final ij tile contains fewer pairs than CUDA lanes.

Problem

The one-density MD J kernel loaded pair_ij_loc[task_ij] before checking whether task_ij represented a valid pair. Tail lanes are required to participate in the block-wide reduction and synchronization, but they do not correspond to real ij tasks.

The issue was observed for H2O+ with def2-TZVP in the (fd|ps) quartet:

• npairs_ij = 2
• threadsx = 8
• tilex = 32

This leaves lanes tx=2..7 without corresponding pairs. Although the final atomicAdd was already guarded by task_ij < npairs_ij, the pair_ij_loc lookup occurred before that guard.

The resulting value was normally discarded, so numerical results could remain correct. Whether the read produced a CUDA memory error depended on GPU architecture, compiler optimization, and allocation layout. The error was observed on an A100 but remained latent on another GPU.

Add a focused H2O+/def2-TZVP regression that:

selects the one-density kernel by combining the UKS spin densities;
exercises the observed (fd|ps) partial tile;
bypasses CuPy's memory pool so memory checkers can observe the actual allocation boundary;
verifies the resulting Coulomb matrix against the CPU reference.
A temporary unconditional device assertion before the original lookup confirmed that the test reaches the invalid tail lanes. The test failed with cudaErrorAssert before the fix and passed after guarding the lookup.